# Analog Circuit Design - IO Design Engineer at Samsung Electronics

Samsung Electronics is hiring an Analog Circuit Design - IO Design Engineer in Bengaluru, India. Level rates it Little AI ●○○○; you can [apply on Samsung Electronics](https://jobsbylevel.com/go/be9d8323-5c3e-47c8-b9f1-f670b606c616?utm_medium=ai-agent).

AI Level 1, AI centrality 0 out of 100. SSIR, Goldstone, Bangalore, India.

## Details

- Company: [Samsung Electronics](https://jobsbylevel.com/companies/samsung-electronics)
- AI level: AI Level 1 (score 0 out of 100)
- Location: SSIR, Goldstone, Bangalore, India
- Posted: June 26, 2026
- Apply: https://jobsbylevel.com/go/be9d8323-5c3e-47c8-b9f1-f670b606c616?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=analog-circuit-design-io-design-engineer-at-samsung-electronics-a03af6

## Prepare for this job

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## Description

Position Summary About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centres outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Role and Responsibilities Roles and Responsibilities 1) Proficient in GPIO cells like TX, RX & Serial Interface logics. 2) Sound knowledge on Analog basic blocks design like comparators, schmitt triggers, filters & Opamps. 3) At least 2 or 3-Projects tape out experience is required preferably in GPIO platforms. 4) Strong knowledge on High voltage designs(LVCMOS33, LVCMOS25 & LVCMOS18 serial interfaces) with stacked driver(2-stack or 3-stack)architecture implementation. 5) Design knowledge on Power clamp, Ground clamp cell developments. 6) Expected experience range : 7 to 13 years. Skills and Qualifications Experience – 7 to 13 Years of experience Qualifications B.Tech/B.E/M.Tech/M.E Disclaimer Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law. * Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here .

Source: https://jobsbylevel.com/jobs/analog-circuit-design-io-design-engineer-at-samsung-electronics-a03af6

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