# Analog Design Flow and Infrastructure Design Automation Manager at Intel

Intel is hiring an Analog Design Flow and Infrastructure Design Automation Manager in Bengaluru, India. Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/620c2147-068b-4856-af6d-3c7bd6c4ae67?utm_medium=ai-agent).

AI Level 1, AI centrality 36 out of 100. India, Bangalore.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 36 out of 100)
- Location: India, Bangalore
- Posted: August 26, 2026
- Apply: https://jobsbylevel.com/go/620c2147-068b-4856-af6d-3c7bd6c4ae67?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=analog-design-flow-and-infrastructure-design-automation-manager-at-intel-e8e91d

## Description

Job Details: Job Description: We are seeking an experienced Analog Design and Infrastructure DA Manager to lead the development, deployment, and governance of analog/mixed-signal design environments and CAD infrastructure. This role owns EDA tool ecosystems, PDK integration, compute infrastructure, design data governance, and tapeout manifest management to ensure high productivity, reproducibility, and audit readiness across silicon programs..The ideal candidate combines deep analog/mixed-signal design flow and e-test structure development expertise with strong infrastructure leadership and disciplined configuration/data management practices. Key Responsibilities-1. Analog Design Environment and Flow Management-Own and maintain analog and mixed-signal design flows using platforms such as Virtuoso ,Develop and maintain schematic, layout, verification, and extraction flows (LVS, DRC).Support simulation environments including HSPICE, Corner analysis.Drive automation and methodology improvements to reduce turnaround time and increase design robustness. 2. Infrastructure and Compute Management Oversee Linux-based DA infrastructure including compute farms, storage systems, and license servers (FlexLM). Manage LSF/grid environments and job scheduling systems. Ensure scalability, system monitoring, high availability, and performance optimization. Partner with IT on hardware lifecycle planning, cloud integration, and disaster recovery. Maintain secure, access-controlled design environments aligned with IP protection policies. 3. Design Data, Manifest and Configuration Management Design Data Governance Manage large-scale analog design libraries, hierarchical database structures, and technology libraries. Define backup, archival, and retention policies for tapeout-critical data. Implement data integrity validation and corruption prevention controls. Oversee distributed storage systems optimized for EDA workloads. Manifest and Tapeout Release Management Own creation and governance of tapeout manifests including: PDK Versions, Tool Versions, Extraction/Verification Decks, Simulation Models, Signoff Configurations Establish reproducible environment release frameworks for analog programs. Implement controlled qualification flows for tool/PDK upgrades prior to production rollout. Maintain environment snapshots to ensure reproducibility and post-silicon traceability. Support formal tapeout readiness and design signoff reviews. Version Control and Configuration Management Deploy and manage version control systems (Git, Cliosoft, SVN, Perforce,) for: CAD scripts and automation, Methodology flows, PDK overlays, Verification decks Define branching, tagging, and release strategies for multi-project and multi-node environments. Implement dependency tracking across tools, PDKs, IP, and infrastructure. Apply infrastructure-as-code principles where applicable. Automation and Traceability Develop automated environment capture tools to log tool versions, library states, and system configurations. Enable reproducible simulations and environment packaging. Create dashboards and reporting metrics for design data health and DA service KPIs. 4. Leadership and Cross-Functional Collaboration Lead and mentor DA and infrastructure engineers. Serve as the primary interface between analog design, digital CAD, IT, and EDA vendors. Drive tool evaluations, upgrades, and vendor negotiations. Develop internal documentation, training programs, and best practices. Establish measurable service-level KPIs and continuously improve DA operations. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in analog/mixed-signal design or CAD support. 5+ years of leadership experience. Strong hands-on experience with analog design platforms such as Virtuoso and p-cell development. Custom Compiler. Deep understanding of analog layout, verification flows, PDK integration, and tapeout processes. Proven

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Source: https://jobsbylevel.com/jobs/analog-design-flow-and-infrastructure-design-automation-manager-at-intel-e8e91d

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Level. https://jobsbylevel.com/jobs/analog-design-flow-and-infrastructure-design-automation-manager-at-intel-e8e91d.

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