# ASIC Design Verification Technical Leader at Cisco

Cisco is hiring an ASIC Design Verification Technical Leader in San Jose, United States. It pays $187k-$268k a year and Level rates it Little AI ●○○○; you can [apply on Level](https://jobsbylevel.com/go/c29a2c7b-1d0c-4793-a980-e1db21896df3).

AI Level 1, AI centrality 20 out of 100. San Jose, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 20 out of 100)
- Location: San Jose, California, US
- Salary: $187k-$268k
- Posted: September 28, 2026
- Apply: https://jobsbylevel.com/go/c29a2c7b-1d0c-4793-a980-e1db21896df3

## Description

The application window is expected to close on: 10/27/2026 This role requires being onsite in San Jose, CA at least 4 days/week. Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact Lead the planning and execution of ASIC verification for complex networking SoCs, ensuring high-quality and predictable project execution. Drive verification strategy, testplan development, coverage closure, and execution across multiple IPs and subsystem-level verification efforts. Provide technical leadership and mentorship to verification engineers, promoting best practices and technical excellence. Develop and enhance scalable, reusable verification environments, infrastructure, and methodologies using SystemVerilog/UVM. Collaborate closely with architecture, RTL, emulation, FPGA, and post-silicon teams to enable efficient debug and successful silicon bring-up. Lead complex debug efforts, perform root cause analysis, and drive issues to closure across simulation, emulation, and silicon. Champion continuous improvements in verification productivity, automation, regression efficiency, and quality metrics. Evaluate and adopt new verification technologies, methodologies, and industry best practices to improve verification effectiveness. Minimum Qualifications Bachelor's degree with 10+ years of related experience, or Master's degree with 7+ years of related experience, or Ph.D. with 5+ years of related experience. Strong experience with SystemVerilog, UVM, and modern verification methodologies, including hardware emulation. Experience developing and executing verification strategies for complex ASIC or SoC programs. Experience leading verification teams or serving as the technical lead for complex verification projects. Proficiency in scripting languages such as Python or Perl Preferred Qualifications Experience with Datacenter, Hyperscaler, AI, or networking ASICs. Deep understanding of high-speed protocols (e.g., PCIe, Ethernet, CXL, HBM, DDR) and large-scale SoC architectures. Hands-on experience with hardware emulation platforms such as FPGA prototyping, Cadence Palladium, Siemens Veloce/StratoCS, or Synopsys ZeBu. Experience with silicon bring-up, post-silicon validation, and debug. Experience optimizing verification productivity, regression infrastructure, and automation. Strong technical leadership, communication, collaboration, and mentoring skills Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $186,900.00 to $267,700.00 and

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/asic-design-verification-technical-leader-at-cisco-7ab296

Source: https://jobsbylevel.com/jobs/asic-design-verification-technical-leader-at-cisco-7ab296

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