# ASIC DFT Technical Leader- MBIST at Cisco

Cisco is hiring an ASIC DFT Technical Leader- MBIST in San Jose, United States. It pays $214k-$310k a year and Level rates it Little AI ●○○○; you can [apply on Cisco](https://jobsbylevel.com/go/94cb6972-f4ab-423e-a028-3e71612e5cf9?utm_medium=ai-agent).

AI Level 1, AI centrality 10 out of 100. San Jose, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 10 out of 100)
- Location: San Jose, California, US
- Salary: $214k-$310k
- Posted: September 3, 2026
- Apply: https://jobsbylevel.com/go/94cb6972-f4ab-423e-a028-3e71612e5cf9?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=asic-dft-technical-leader-mbist-at-cisco-dafba8

## Prepare for this job

The job page lists 5 likely interview questions for this offer, with a CV checklist: https://jobsbylevel.com/jobs/asic-dft-technical-leader-mbist-at-cisco-dafba8

## Description

The application window is expected to close on: 11/19/2026 Meet the team: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. You will be part of the Silicon One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team you will be involved in crafting cutting edge next generation networking chips. Your Impact ​: You will be leading the MBIST methodology in silicon one chips.​ Design & implement robust and reusable MBIST architecture. ​ Spec comprehensive MBIST architecture and implementation agnostic to technology and tools.​ MBIST requirement definition for advanced technology nodes & advanced tech packages. ​ Minimum Qualifications ​: Bachelors in Electrical engineering with at least 12+years (or Master's with 10+ years) of experience in ASIC DFT​. Prior experience with memory architectures (SRAM, DRAM, etc.) and failure modes.​ Prior experience with industry-standard DFT tools (e.g., Synopsys DesignWare, SMS, TestMax, Mentor Graphics Tessent).​ Scripting skills (Python, TCL, Perl) for automation of test generation and analysis.​ Strategic Skills: Ability to plan and execute complex test strategies, excellent communication skills for cross-team collaboration, and a focus on silicon quality and yield improvement.​ Preferred Qualifications ​: Experience in Verilog/System Verilog.​ Experience addressing Memory failure correlation in production. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $214,100.00 to $309,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment

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Source: https://jobsbylevel.com/jobs/asic-dft-technical-leader-mbist-at-cisco-dafba8

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