# ASIC Post silicon DFT Technical Leader at Cisco

Cisco is hiring an ASIC Post silicon DFT Technical Leader in Austin, United States. It pays $178k-$257k a year and Level rates it Little AI ●○○○; you can [apply on Level](https://jobsbylevel.com/go/097ff1fa-d103-4f81-8cdd-5105b846a31c?utm_medium=ai-agent).

AI Level 1, AI centrality 31 out of 100. Austin, Texas, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 31 out of 100)
- Location: Austin, Texas, US
- Salary: $178k-$257k
- Posted: October 13, 2026
- Apply: https://jobsbylevel.com/go/097ff1fa-d103-4f81-8cdd-5105b846a31c?utm_medium=ai-agent

## Description

The application window is expected to close on: 12/03/2026 Meet the Team: The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world Your Impact: You will be in the Silicon One development organization as a senior ASIC post silicon DFT Lead. You will work with post silicon product engineering team, Reliability, Board team, package team, functional test team and system teams to understand and define post-silicon bringup to production roadmap and drive DFT requirements early in the design cycle. As a lead of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the post-silicon process and quality process through the entire production phase from DFT design side. Minimum Qualifications: Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12 years of experience. Prior experience in post-silicon validation, hardware bring-up, Yield/reliability learnings, ramp acceleration, FA efficiency, and production scalability Prior experience working with DFT team & post-silicon validation from initial bringup to high volume production Prior experience working with Gate level simulation, debugging with VCS and other simulators. Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687 Preferred Qualifications: Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification DFT CAD development - Test Architecture, Methodology and Infrastructure Test Static Timing Analysis Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $177,600.00 to $257,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/asic-post-silicon-dft-technical-leader-at-cisco-bdbccb

Source: https://jobsbylevel.com/jobs/asic-post-silicon-dft-technical-leader-at-cisco-bdbccb

## Cite this page

Level. https://jobsbylevel.com/jobs/asic-post-silicon-dft-technical-leader-at-cisco-bdbccb.

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