# Compiler Engineer for Tile-based AI DSLs at Intel

Intel is hiring a Compiler Engineer for Tile-based AI DSLs in Santa Clara, United States. It pays $150k-$285k a year and Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/85cec40b-77ae-4b14-bba7-ee29b0a941a8?utm_medium=ai-agent).

AI Level 1, AI centrality 18 out of 100. US, California, Santa Clara.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 18 out of 100)
- Location: US, California, Santa Clara
- Salary: $150k-$285k
- Posted: October 30, 2026
- Apply: https://jobsbylevel.com/go/85cec40b-77ae-4b14-bba7-ee29b0a941a8?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=compiler-engineer-for-tile-based-ai-dsls-at-intel-cb377f

## Description

Job Details: Job Description: The Role and Impact In this position as a Compiler Engineer, you will focus on enhancing and maintaining cutting-edge compiler software tools optimized for Intel processors. Your day-to-day responsibilities will revolve around feature development, performance optimization, and resolving software defects to ensure the high quality and efficiency of compiler-generated code. You will play a critical role in enabling developers worldwide to maximize the performance of Intel's CPU and GPU platforms. Business Group As part of Intel's Data Center Group (DCG), the Compiler Technology Innovation team is responsible for developing industry-leading compiler tools that support Intel's processors. The team operates at the forefront of the software stack, driving innovation in high-performance computing, artificial intelligence, and heterogeneous computing. Through collaboration across engineering teams and contributions to open-source communities, the group plays a pivotal role in advancing Intel's leadership in processor technology. Key Responsibilities Develop new features and resolve software defects in Intel compilers targeting CPU and GPU architectures. Optimize compiler code generation for performance improvements across diverse applications and benchmarks. Conduct functional, performance, and stress tests on compiler tools to ensure quality and reliability. Collaborate across geographies with engineering, validation, and performance teams to enhance product quality and usability. Contribute to open-source initiatives, including LLVM. The ideal candidate should exhibit the following behavioral traits Ability to work independently and effectively in a collaborative environment Strong ownership mindset with a proactive approach to resolving challenges. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel Immigration sponsorship. Minimum Qualifications Bachelor's degree in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 4+ years of experience. OR Master’s degree in in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 3+ years of experience. OR PhD degree in in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 1+ years of experience. The experience listed above should be a combination of the following: Experience in C/C++, SYCL, CUDA, DSLs, object-oriented programming, and development of production-quality compilers or similar software tools. Proven expertise in compiler architecture and software optimizations for CPU/GPU performance. Experience with troubleshooting and resolving technical issues and debugging skills. Preferred Qualifications Experience with parallel programming models, such as OpenMP, and vectorization techniques. Hands-on experience with LLVM, MLIR, TileIR compiler framework, including compiler optimizations and code generation for efficient CPU performance. Knowledge of performance analysis tools (e.g., perf) and modern CPU/GPU architecture. Familiarity with language runtimes, memory models, and scheduling optimization across heterogeneous architectures. Proven cross-industry collaboration on language standards and specifications. Join our team of innovators and become an integral part of advancing compiler technology that drives performance breakthroughs across diverse computing workloads. Let's shape the future of computing together. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, Austin Posting Statement: All qualified applicants will receive consideration for

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/compiler-engineer-for-tile-based-ai-dsls-at-intel-cb377f

Source: https://jobsbylevel.com/jobs/compiler-engineer-for-tile-based-ai-dsls-at-intel-cb377f

## Cite this page

Level. https://jobsbylevel.com/jobs/compiler-engineer-for-tile-based-ai-dsls-at-intel-cb377f.

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