# Hardware Design Validation Engineer at NVIDIA

NVIDIA is hiring a Hardware Design Validation Engineer in Santa Clara, United States. It pays $108k-$184k a year and Level rates it Little AI ●○○○; you can [apply on NVIDIA](https://jobsbylevel.com/go/b7600465-fc64-4e49-a607-57315759e681?utm_medium=ai-agent).

AI Level 1, AI centrality 35 out of 100. US, CA, Santa Clara.

## Details

- Company: [NVIDIA](https://jobsbylevel.com/companies/nvidia)
- AI level: AI Level 1 (score 35 out of 100)
- Location: US, CA, Santa Clara
- Salary: $108k-$184k
- Posted: November 13, 2026
- Apply: https://jobsbylevel.com/go/b7600465-fc64-4e49-a607-57315759e681?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=hardware-design-validation-engineer-at-nvidia-4cd61c

## Description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in an inclusive, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA's technology has an effect on people through the products developed around it. The System Product Team (SPT) transforms that technology into complete systems: data center servers and racks, laptops and PCs, graphics cards, consumer electronic devices, and SoC-based automotive ECUs. Partnering with silicon, software, manufacturing, and many other teams across NVIDIA, we guide products from first power-on to customers across the globe. If you want to be involved in that process, SPT is a wonderful place to do so. Validation is where hardware becomes real. Our team is responsible for the working hardware: that it powers up, performs to spec, holds up under stress and is ready for customers. We bring up new systems in the lab, push them to their limits, find what no one has seen before and drive every issue to a fix. Ultimately, we deliver the hardware. If you think like an owner and want your name behind something that works, you'll fit right in. What you will be doing: Own validation: a module, board section or small product, partnering with the Lead Validation Engineer from first power-on to mass production. Support test plan development and run in one or more areas such as power, high-speed IO, low-speed IO (I2C, SPI, UART, SMBus, GPIO), clocks/resets, BMC, sensors, telemetry and firmware. Debug and root-cause: board, firmware and system issues from bring-up through production, using measurements and first-principles analysis. Power validation: sequencing, load, transient and protection testing. High-speed interfaces: PCIe, Ethernet and USB, using high-bandwidth scopes, TDR and protocol analyzers. System stress testing: thermal, power, IO, memory and voltage/frequency corners to expose marginal failures, with clear reports on status, issues and risks. Design review: schematics, layouts, BOMs and datasheets and giving timely feedback that improves the product. NPI and production support: builds and debug at manufacturing sites, locally and overseas to help products ship on time. Cross-functional and software work: partner with mechanical, design, industrial design, thermal, shock and vibration, EMI/EMC, software teams, plus JDM partners, vendors and teams in Asia and Europe, following issues through closure. Validate hardware with SBIOS, VBIOS, drivers, Windows, Linux, automotive OS and Android, and build test scripts and automation. Communicate status and risks and mentor interns and newer engineers. What we need to see: BS or MS in EE/CE or equivalent experience, plus 2+ years of hands-on board or system hardware validation, bring-up or debug (internships and co-ops count). EE fundamentals: very strong circuit analysis, digital design, transmission lines and power supplies, shown through projects and work. Core validation: Strong hands-on experience in one or more areas such as power validation (regulators, sequencing, PDN, telemetry), high-speed IO validation (PCIe, Ethernet, USB, display or DDR), Low-speed IO (I2C, SPI, UART, SMBus, GPIO), system functional and stress testing. Lab skills: hands-on with oscilloscopes, power supplies, electronic loads, DMMs, TDR and logic/protocol analyzers. Design skills: working knowledge of schematics, PCB layout and BOM. Debug skills: root-cause failures across board, firmware and software using

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Source: https://jobsbylevel.com/jobs/hardware-design-validation-engineer-at-nvidia-4cd61c

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