# Hardware Engineer at Cisco

Cisco is hiring a Hardware Engineer in San Jose, United States. It pays $155k-$225k a year and Level rates it Little AI ●○○○; you can [apply on Cisco](https://jobsbylevel.com/go/f87a9f30-85ad-4894-93ba-bd57cc7a3674?utm_medium=ai-agent).

AI Level 1, AI centrality 31 out of 100. San Jose, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 31 out of 100)
- Location: San Jose, California, US
- Salary: $155k-$225k
- Posted: September 23, 2026
- Apply: https://jobsbylevel.com/go/f87a9f30-85ad-4894-93ba-bd57cc7a3674?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=hardware-engineer-at-cisco-5f7b7a

## Description

The application window is expected to close on: 11/29/2026 Meet the Team The Firewall Hardware Team at Cisco is responsible for designing and developing high-performance, secure firewall hardware platforms that protect enterprise, data center, and cloud networks from evolving cyber threats. This team focuses on creating advanced hardware solutions, including FPGA-based crypto accelerators and network processing units, to deliver exceptional throughput, low latency, and robust security features. Your Impact As a Senior Hardware Design Engineer, you will serve as a technical lead for the development of Cisco’s next-generation security hardware appliances. You will own the end-to-end hardware development lifecycle, from architectural definition to mass production. This role requires a high degree of autonomy, technical leadership, and the ability to drive innovation within a fast-paced environment. You will act as a subject matter expert, mentoring junior engineers and collaborating across global cross-functional teams to deliver carrier-grade products. Key Responsibilities Technical Leadership: Lead the hardware development lifecycle for complex, high-performance security appliances, ensuring alignment with product roadmaps and architectural standards. Design Ownership: Architect and drive the creation of complex circuit designs, schematics, and PCB layouts, ensuring optimal performance, signal integrity, and manufacturability. System-Level Validation: Define and execute comprehensive design verification and validation (DVT) strategies, ensuring adherence to rigorous regulatory and performance specifications. Advanced Troubleshooting: Serve as the primary technical authority for complex root cause analysis of hardware issues, including signal integrity, power distribution, and mechanical integration. Strategic Collaboration: Act as a key technical liaison between hardware, software, BIOS, and manufacturing teams. Provide expert guidance to resolve cross-functional bottlenecks. Process & Quality: Drive continuous improvement in design methodologies, maintain high-quality technical documentation, and conduct rigorous design reviews to mitigate risk. Mentorship: Provide technical guidance and mentorship to junior engineering staff, fostering a culture of innovation and engineering excellence. Integrate AI-driven design, simulation, and diagnostic tools to streamline design cycles, enhance predictive quality analysis, and improve overall operational efficiency Minimum Qualifications: 4+ years of experience with a Masters’ degree or 7+ years of experience with a Bachelors’ degree. Experience expected to be in hardware design. Experience taking complex hardware products from concept to production. Experience with industry-standard design suites, such as Cadence Allegro/Concept, Mentor Graphics Xpedition, etc. Preferred Qualifications: Architectural Expertise: Deep proficiency in board design leveraging x86, ARM, and high-performance FPGA/SoC architectures. High-Speed Design: Expert-level knowledge of high-speed interface bus design (PCIe Gen 4/5, DDR5, PAM4) and high-speed Ethernet (100G/400G). Board-Mounted Power Design (Bonus): Demonstrated expertise in designing robust power delivery networks (PDN). Proficiency in selecting and implementing DC-DC converters, LDOs, and managing power sequencing for high-current, low-voltage processors, FPGAs, and ASICs. Signal & Power Integrity: Advanced capability in modeling and mitigating signal integrity and power distribution challenges in dense, high-speed systems. Firmware/RTL Interaction: Strong understanding of RTL design (Verilog/System-Verilog) and its interaction with hardware/BIOS. Communication: Exceptional ability to communicate complex technical concepts to both technical and non-technical stakeholders. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/hardware-engineer-at-cisco-5f7b7a

Source: https://jobsbylevel.com/jobs/hardware-engineer-at-cisco-5f7b7a

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