# Lead ASIC Modem Design Engineer, Satellite Communication at Amazon

Amazon is hiring a Lead ASIC Modem Design Engineer, Satellite Communication in San Diego, United States. It pays $185k-$250k a year and Level rates it Little AI ●○○○; you can [apply on Amazon](https://jobsbylevel.com/go/1e7606c2-9a7d-4768-b6b3-38e9552d8673?utm_medium=ai-agent).

AI Level 1, AI centrality 37 out of 100. US, CA, San Diego.

## Details

- Company: [Amazon](https://jobsbylevel.com/companies/amazon)
- AI level: AI Level 1 (score 37 out of 100)
- Location: US, CA, San Diego
- Salary: $185k-$250k
- Posted: November 2, 2026
- Apply: https://jobsbylevel.com/go/1e7606c2-9a7d-4768-b6b3-38e9552d8673?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=lead-asic-modem-design-engineer-satellite-communication-at-amazon-c76124

## Description

Lead ASIC Modem Design Engineer, Satellite Communication role within a high performance ASIC Modem design team. This team is using industry leading methodologies to develop proprietary IP's. Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role: Be part of Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a state-of-the-art wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: •Implement wireless system architecture in silicon from system specification to microarchitecture to RTL implementation to optimizing timing / power to chip level validation. •Develop solutions optimizing customer experience (throughput, latency, and availability) while meeting power and cost constraints. •Drive high quality designs for first-time right silicon solutions, and meeting the power objectives •Create standalone verification test bench to verify the correctness of your block. •Work with the verification team and participate in System level verification using test benches constructed using UVM, System C and DPI-C. •Ensure that the block meets DFT, timing and power targets by working closely with the implementation team. •Learn about requirements and solutions for systems operating in space •Drive trade-off analysis to benefit customer experience and optimization of resources (costs, power, spectrum). •Define specifications and architecture/micro-architecture for modem PHY subsystem blocks, including signal processing data paths. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Engage with architects and system engineers to drive hardware micro-architecture. • Lead design of 1 or more DSP data path subsystems System Verilog. Able to interpret reference models in MATLAB/C/C++ • Involve in control plane logic design and interfaces to bus fabrics. • Explore and propose innovative ideas and work towards optimization of the modem. • Work closely with PHY-MAC boundary teams, software teams, and system integration teams to resolve complex HW-SW interaction issues. • Support emulation platforms for early software development and system-level validation of modem IP. • Mentor and assign work to junior team members. Basic qualifications - Bachelor's degree in Electrical/Communications Engineering, or experience working in electrical engineering field - 7+ years of experience in digital logic design, preferably in DSP or communication systems. Preferred qualifications - Master's or Ph.D degree in Electrical / Communications Engineering. - 7+ years of experience in digital design, preferably in communication systems. - Familiarity with UVM and Matlab. - Knowledge of wireless communication standards (e.g., 5G NR, LTE, DVB-S2/S2X, or satellite communication protocols). - Experience with ASIC design tools such as Cadence, Synopsys, or Mentor Graphics for synthesis, timing analysis, and physical design flows. - Experience with low-power design techniques for advanced CMOS nodes. - Strong analytical, debugging, and problem-solving skills for complex silicon issues. - Ability to write assertions and exposure to Formal verification Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/lead-asic-modem-design-engineer-satellite-communication-at-amazon-c76124

Source: https://jobsbylevel.com/jobs/lead-asic-modem-design-engineer-satellite-communication-at-amazon-c76124

## Cite this page

Level. https://jobsbylevel.com/jobs/lead-asic-modem-design-engineer-satellite-communication-at-amazon-c76124.

Get job alerts: https://jobsbylevel.com/newsletter