# Power Delivery Design Engineer at Intel

Intel is hiring a Power Delivery Design Engineer in Toronto, Canada. Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/9848ce88-8fd8-4a5a-80ca-1c7b052d86c6?utm_medium=ai-agent).

AI Level 1, AI centrality 23 out of 100. Canada, Toronto.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 23 out of 100)
- Location: Canada, Toronto
- Posted: October 20, 2026
- Apply: https://jobsbylevel.com/go/9848ce88-8fd8-4a5a-80ca-1c7b052d86c6?utm_medium=ai-agent

## Description

Job Details: Job Description: Are you passionate about computing and AI accelerators? Do you thrive on innovation and want to disrupt the industry? Are you eager to work with leading AI hardware engineers on Intel's latest architecture? If you love collaborating with diverse teams to create best-in-class AI compute platforms, Intel's GPE department has exciting opportunities for you. As a member of the GPE team, you will develop hardware and platform solutions for Intel products, including the newest IPs targeted at next-generation GPUs and AI accelerators. You will have the opportunity to engage in enabling technologies in PCB design, manufacturing, testing, and debugging. We are a winning team with a clear vision of delivering competitive and cutting-edge products, and we are committed to building the best products and developing the best skills for our team. Key Responsibilities: Work on end-to-end power delivery design and development, from initial concept to implementation of power delivery requirements and ecosystem enabling power integrated circuits. Own power integrity simulation for the platform power delivery network: build and correlate VRM-to-die PDN models, run DC IR-drop and AC target-impedance analysis, and perform transient droop and Ldi/dt studies across die, package, and PCB to set the decoupling and stack up strategy before layout is committed. Apply knowledge of power conversion topologies, including components, compensation circuits/stability analysis, drop/droop analysis, simulation tools , and techniques, as well as PCB layout and design tools, to characterize performance and validate correlation of simulation modeling and results. Design and validate platform power conversion and management solutions, including energy management, and perform simulation and optimization for package and PCB, including stack up, power/ground noise plane assignment, decoupling solutions, and/or power sequencing requirements. Design for debug: architect observability into the board from the start, including per-rail voltage and current sense points, Kelvin-sense and probe landing points, telemetry and current-monitor access (SVID/PMBus/IMON), rail-level isolation and enable control, and voltage-margining , so power-on and post-silicon issues can be isolated on the first board instead of a respin. Design for flexibility: build configurability into the power delivery solution so a single board can support multiple SKUs and derivatives, using stuffing options for phase count and decoupling, pin-compatible dual-source regulator footprints, rail split/merge and current headroom for higher-power SKUs, and programmable load line, compensation, and VID range. Create and execute test plans to validate and characterize power delivery solutions. Correlate bench and VR test tool measurements with simulation results to improve simulation model accuracy and close the loop on power integrity assumptions. Conduct failure analysis and root cause investigations for power delivery issues, implementing corrective actions to prevent recurrence. Collaborate with silicon and platform architects to generate solutions and analyses, delivering content into platform design guides as solution collaterals for end customers. Collaborate with cross-functional teams, including board design, SW/FW, and systems validation, to ensure seamless integration of power delivery solutions. Qualifications: Minimum Qualifications , you must possess the below minimum qualifications to be initially considered for this position. Bachelor's or Master's degree in Electrical Engineering or a related field. 5+ years of experience in: Designing low voltage, high current, multi-phase DC-DC switching regulators (buck, boost, etc.) to meet stringent targets, optimizing the design for transient response and conversion efficiency. Working with signal/power integrity and power delivery network simulation tools such as Cadence Sigrity PowerDC/PowerSI, Ansys SIwave etc. to develop

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/power-delivery-design-engineer-at-intel-3434a7

Source: https://jobsbylevel.com/jobs/power-delivery-design-engineer-at-intel-3434a7

## Cite this page

Level. https://jobsbylevel.com/jobs/power-delivery-design-engineer-at-intel-3434a7.

Get job alerts: https://jobsbylevel.com/newsletter