# Power Integrity Engineer at Intel

Intel is hiring a Power Integrity Engineer in Phoenix, United States. It pays $106k-$173k a year and Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/b599f1c7-438a-4818-97e4-3a5a299f4d9b?utm_medium=ai-agent).

AI Level 1, AI centrality 31 out of 100. US, Arizona, Phoenix.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 31 out of 100)
- Location: US, Arizona, Phoenix
- Salary: $106k-$173k
- Posted: November 4, 2026
- Apply: https://jobsbylevel.com/go/b599f1c7-438a-4818-97e4-3a5a299f4d9b?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=power-integrity-engineer-at-intel-296725

## Description

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. As a Power Integrity Engineer, you will contribute to the development and validation of power delivery solutions for complex, high-speed silicon, package, and platform designs. You will work with cross-functional engineering teams to analyze, optimize, and validate power delivery networks from silicon through package and board. Your responsibilities will include, but are not limited to : • Develop and analyze power delivery networks (PDNs) for silicon, packages, boards, and high-speed platforms. • Perform 2D and 3D electromagnetic model extraction and power-noise analysis across the end-to-end power delivery path, including die/C4 bumps, package, socket, and board. • Define and evaluate power-grid specifications, power-noise budgets, and design targets to balance power integrity, performance, area, and platform requirements. • Apply power integrity principles and simulation methodologies to guide package and platform design and physical implementation. • Analyze PDN impedance, voltage droop, resonance, ground bounce, decoupling effectiveness, and other power-noise characteristics. • Develop electrical analysis methodologies, test structures, and verification plans for power delivery design and validation. • Perform laboratory measurements to characterize power noise across frequency, transient response, ground bounce, and other key PDN metrics. • Correlate post-silicon/platform measurements with pre-silicon simulations and models to improve design accuracy and methodology. • Evaluate and optimize on-die, package, and platform decoupling strategies. • Support voltage regulator (VR) performance characterization and optimization as part of the overall platform power delivery solution. • Develop platform-level power delivery and decoupling recommendations for incorporation into platform design guides. • Translate silicon power requirements into package and platform-level specifications and support design pathfinding to meet performance and form-factor requirements. • Collaborate with silicon integration, die floorplanning, package, board/platform, voltage regulator, and validation teams to optimize the end-to-end power delivery solution. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. Minimum Qualifications: • Bachelor's in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 1+ years of experience OR Master's degree in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 0+ years of experience. • 1+ years of experience in one or more of the following areas: Power integrity or power delivery. Power electronics. Signal integrity. Voltage regulator design or validation. PCB/package electrical modeling. Electrical simulation. Electrical laboratory testing or validation. Preferred Qualifications: The following qualifications are considered a plus: • Experience with printed circuit board (PCB) and/or semiconductor package design and technology. • Experience analyzing power delivery networks, including

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Source: https://jobsbylevel.com/jobs/power-integrity-engineer-at-intel-296725

## Cite this page

Level. https://jobsbylevel.com/jobs/power-integrity-engineer-at-intel-296725.

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