# Principal Post-Silicon Validation Engineer at SambaNova Systems

SambaNova Systems is hiring a Principal Post-Silicon Validation Engineer in San Jose, United States. It pays $180k-$255k a year and Level rates it Builds AI ●●●●; you can [apply on SambaNova Systems](https://jobsbylevel.com/go/738f6ea4-0ad0-4472-8d13-03e5c6f1c634?utm_medium=ai-agent).

AI Level 4, AI centrality 85 out of 100. San Jose, California, United States.

## Details

- Company: [SambaNova Systems](https://jobsbylevel.com/companies/sambanova-systems)
- AI level: AI Level 4 (score 85 out of 100)
- Location: San Jose, California, United States
- Salary: $180k-$255k
- Posted: August 18, 2026
- Apply: https://jobsbylevel.com/go/738f6ea4-0ad0-4472-8d13-03e5c6f1c634?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=principal-post-silicon-validation-engineer-at-sambanova-systems-08a274

## Prepare for this job

The job page lists 5 likely interview questions for this offer, with a CV checklist: https://jobsbylevel.com/jobs/principal-post-silicon-validation-engineer-at-sambanova-systems-08a274

## Description

SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. At the core of SambaNova's technology is the RDU (Reconfigurable Dataflow Unit) — a chip built on a dataflow architecture rather than the traditional GPU model. Its decode performance is especially strong for agentic workloads like multi-turn agents, code generation, and long-running applications. RDUs are packaged into SambaRack, rack-scale hardware that lets customers deploy state-of-the-art models with better performance, greater energy efficiency, and faster time to value. About the team We're the team behind post-silicon bring-up, debug, and validation for the high-speed IO and memory subsystems in SambaNova's DataScale platform. We own the path from first silicon power-on through field deployment: characterization, stress testing, performance validation, and root-causing issues across silicon, board, and software. We work directly with design, firmware, verification, and system engineering to keep bring-up on schedule, and partner with customer engineering on deployment and RMA debug. We build our own debug tooling and automation, and apply what we learn to pre-silicon verification to improve coverage on future programs. About the role div]:bg-bg-000/50 [&_pre>div]:border-0.5 [&_pre>div]:border-border-400 [&_.ignore-pre-bg>div]:bg-transparent [&_.standard-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.standard-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8 [&_.progressive-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.progressive-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8"> _*]:min-w-0 gap-3 [&_>_*:last-child]:mb-0 print:block print:[&_>_:where(:not(:first-child))]:mt-3 standard-markdown"> SambaNova is seeking a Principal Engineer to own post-silicon bring-up, debug, and validation of high-speed IO and memory subsystems within the DataScale® platform. This role is central to delivering reliable, high-performance AI systems at scale. You'll lead system-level debug across silicon, board, and software layers, driving issues to root cause from first silicon through field deployment. This is a hands-on role for an engineer with deep expertise in high-speed interfaces and hardware debug, who can operate in ambiguity and execute with high ownership. Responsibilities Own post-silicon bring-up and validation of high-speed IO and memory subsystems, spanning characterization, functional validation, stress testing, and performance analysis Establish power-on readiness ahead of first silicon, including debug infrastructure, tooling, and contingency planning Lead system-level debug to root cause complex issues spanning silicon, board, and software layers Drive resolution with design, firmware, verification, and system teams to close issues and keep bring-up on schedule Partner with system and customer engineering teams on product validation, deployment, and RMA debug Own validation sign-off for product release against stability, performance, and field reliability targets Review SoC and board design and SI/PI analysis through a post-silicon debug and deployment lens Contribute to pre-silicon verification and emulation to improve bring-up efficiency and coverage Build scripts and tooling that automate validation, debug, and data analysis, and scale test coverage across systems Advance post-silicon validation methodology and debug infrastructure across programs Required qualifications M.S. in Electrical Engineering, Computer Science, or a related field 7+ years of experience in post-silicon validation or system bring-up Experience with two or more high-speed IO or memory protocols such as PCIe, Ethernet, HBM, CXL, or UCIe Proven ability to lead cross-functional debug efforts to root cause and closure Strong analytical skills for test development and data analysis Proficiency in scripting such as Python and bash

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Source: https://jobsbylevel.com/jobs/principal-post-silicon-validation-engineer-at-sambanova-systems-08a274

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