# Process Integration Development Engineer - Defect Metrology at Intel

Intel is hiring a Process Integration Development Engineer - Defect Metrology. It pays $99k-$140k a year and Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/4c00b265-7d09-445f-a807-340ec3ab0539?utm_medium=ai-agent).

AI Level 1, AI centrality 37 out of 100. US, Oregon, Hillsboro.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 37 out of 100)
- Location: US, Oregon, Hillsboro
- Salary: $99k-$140k
- Posted: October 27, 2026
- Apply: https://jobsbylevel.com/go/4c00b265-7d09-445f-a807-340ec3ab0539?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=process-integration-development-engineer-defect-metrology-at-intel-042c73

## Description

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet. Life at Intel: https://jobs.intel.com/en/life-at-intel At Intel's Logic Technology Development (LTD), we have continued to extend Moore's law to be world leaders in computing technology. To achieve the necessary scaling of our semiconductor manufacturing process, we have led the industry in developing enhancements such as strained silicon for carrier transport enhancement, high-k metal gates, FinFETs, and next-generation Gate-All-Around architectures. LTD has been at the center of every new development that has kept Moore's Law moving forward. Defect Metrology plays a key role in the development of every new silicon process technology. Our analysis builds the plan that allows LTD to take technology from the research phase to the high-volume manufacturing phase while maintaining high-quality standards. In the Manufacturing Integration Engineering (MIE) organization, we engineer world-class yields on advanced processes by driving defects down to Best-in-Class targets. As a Defect Metrology Engineer, you will be responsible for identifying all defects that impact yield and performance in an advanced silicon process technology. You will characterize the process using cutting-edge metrology tools. With this characterization, you will be responsible for investigating the root cause owners and developing defect reduction roadmaps to achieve program milestone commitments to our customers. You will then work directly with the process modules and integration teams to drive that roadmap by developing and qualifying process fixes through Model-Based Problem Solving (MBPS). You will also respond to defect baseline shifts to isolate the root cause and implement preventative actions consistent with 8D methodology. This role provides an opportunity to influence Intel's future process technologies that will keep Moore's Law moving forward. Responsibilities include but are not limited to: Owning a segment of the process to ensure adequate metrology is placed to detect and respond to all yield-limiting defects prior to reaching end-of-line sort. Investigate and respond to exclusionary baseline shifts to ensure segment defect health is restored to capable, demonstrated baseline. Develop new recipes and RFCs as part of New Product Introduction (NPI). Provide navigation and leadership to meet Intel's yield objectives, utilizing state-of-the-art metrology tools and test vehicles (QTM, Short Loop, etc.). Organizing and presenting defect summaries to F25, LTD, MDCE engineering teams. Partnering with Intel Integration, Yield, and failure analysis labs to provide root cause for all defect issues. Hold the team and collaborators accountable for quality through Integrated Module Team (IMT) and Focus Team (FT) forums. Work collaboratively as a part of the overall LTD Defect metrology group. Role-model and establish a team culture of trust, collaboration, safety, accountability, and sustaining excellence. Build strong relationships with other LTD teams based on mutual trust and respect. The Ideal Candidate Must Demonstrate: Strong data analysis and problem debug skills. Team player with flexibility and adaptability to changing business needs. Strong ownership mindset and driving closure-see the problem, own the problem. Excellent communication and navigation skills to larger audiences. Understand and adhere to Intel cultural values such as Customer First, Fearless Innovation, Results Driven, One Intel, Integrity, Quality, Inclusion. Qualifications:

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/process-integration-development-engineer-defect-metrology-at-intel-042c73

Source: https://jobsbylevel.com/jobs/process-integration-development-engineer-defect-metrology-at-intel-042c73

## Cite this page

Level. https://jobsbylevel.com/jobs/process-integration-development-engineer-defect-metrology-at-intel-042c73.

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