# Senior ASIC Design Verification Engineer - Slingshot at Hewlett Packard Enterprise

Hewlett Packard Enterprise is hiring a Senior ASIC Design Verification Engineer - Slingshot. Level rates it Little AI ●○○○; you can [apply on Hewlett Packard Enterprise](https://jobsbylevel.com/go/2d4bbc56-75eb-4e38-8afe-1eea9f3695b7?utm_medium=ai-agent).

AI Level 1, AI centrality 28 out of 100. Chippewa Falls, Wisconsin, United States of America.

## Details

- Company: [Hewlett Packard Enterprise](https://jobsbylevel.com/companies/hewlett-packard-enterprise)
- AI level: AI Level 1 (score 28 out of 100)
- Location: Chippewa Falls, Wisconsin, United States of America
- Posted: October 20, 2026
- Apply: https://jobsbylevel.com/go/2d4bbc56-75eb-4e38-8afe-1eea9f3695b7?utm_medium=ai-agent

## Description

Senior ASIC Design Verification Engineer - Slingshot This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: In this role you will be responsible for all phases of pre-silicon design verification, including design verification methodology, test-plan development, testbench development, coverage closure, and sign-off reviews. Responsibilities Follow and help define the team's design verification methodology. Develop SystemVerilog and UVM testbench components, including bus functional models that drive and monitor stimulus. Plan and implement block and integration level scoreboards and checkers to verify functional behavior. Write and analyze functional coverage, providing input to block level milestones. Triage regression failures and identify logic bugs, while driving bug closure. Apply scripting, automation, and AI-assisted and agentic tools to improve the speed and quality of the verification process. Provide guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence. Participate in and provide input on the process for selection of future technical leaders. Drive VLSI innovation and integration of new technologies into projects and activities in the design organization. Education and Experience Required Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent. 10+ years of experience in VLSI design, verification, or implementation. Knowledge and Skills Expert level knowledge of SystemVerilog and of OVM or UVM methodologies. Expert level knowledge of programming and scripting languages, hardware description languages, electronic design automation (EDA), and/or FPGA tools. Expert level analytical and problem solving skills. Ability to excel in a distributed team environment. Executive level written and verbal communication skills; mastery in English. Preferred Skills Experience verifying high-speed networking, switching, or NIC ASICs. Experience with agentic AI coding tools and workflows applied to verification. Experience with Python, Perl, Tcl, or another scripting language in Linux development environments. Experience working as part of a geographically distributed team. Accessibility HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here . Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability. What We Can Offer You: Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/senior-asic-design-verification-engineer-slingshot-at-hewlett-packard-enterprise-ed23e2

Source: https://jobsbylevel.com/jobs/senior-asic-design-verification-engineer-slingshot-at-hewlett-packard-enterprise-ed23e2

## Cite this page

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