# Senior Design Verification Engineer at Intel

Intel is hiring a Senior Design Verification Engineer in Austin, United States. It pays $191k-$269k a year and Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/cf8dbbdf-dab4-4976-8751-92c88554b9b7?utm_medium=ai-agent).

AI Level 1, AI centrality 28 out of 100. US, Texas, Austin.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 28 out of 100)
- Location: US, Texas, Austin
- Salary: $191k-$269k
- Posted: November 10, 2026
- Apply: https://jobsbylevel.com/go/cf8dbbdf-dab4-4976-8751-92c88554b9b7?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=senior-design-verification-engineer-at-intel-3df61b

## Description

Job Details: Job Description: About the Role As an IP Design Verification Engineer, you will play a critical role in shaping Intel's innovations by ensuring the functionality and reliability of our intellectual property (IP) designs. You will join a dynamic team that collaborates across architecture, design, and verification groups to ensure our solutions meet and exceed industry standards. Your work will directly impact the development of groundbreaking technologies, driving Intel's success in delivering world-class products to the market. This is an exciting opportunity to contribute to cutting-edge projects while advancing your career in a forward-thinking and collaborative environment. Key Responsibilities Develop and execute comprehensive verification plans to ensure IP logic meets microarchitecture specifications Create and maintain test benches and verification environments to achieve high coverage and reliability Perform system simulations to verify designs, analyze power and timing, and identify bugs in the presilicon environment Debug verification issues by replicating, root-causing, and implementing corrective measures for failing tests Collaborate with architects, RTL developers, and physical design teams to enhance verification methodologies for complex features Document verification plans and drive technical reviews with architecture and design teams Maintain and improve existing verification infrastructure, tools, and methodologies Participate in defining verification infrastructure and contribute to the development of technical flow methodologies (TFMs) You Should Demonstrate the Following to Be Successful Strong collaboration and communication skills to effectively work across architecture, design, and physical teams Demonstrated ability to lead technical reviews and drive alignment on verification strategies Passion for continuous learning, innovation, and contributing to a culture of technical excellence Proven ability to analyze and resolve complex design issues in a presilicon environment Qualifications: Minimum Qualifications Bachelor's or BS degree in Electrical Engineering, Computer Engineering, or a related field 9+ years of experience in IP functional verification with a Bachelor's degree, 6 years with a Master's degree, or 4 years with a PhD The above experience must include: Hands-on experience in building verification environments using SystemVerilog and UVM Expertise in RTL design and debugging using industry-standard tools and methodologies Hands-on experience verifying networking IPs/SoCs implementing RDMA (RoCEv2, iWARP, InfiniBand) or comparable reliable transport protocols (e.g., Ultra Ethernet Transport, TCP offload), including features such as QP/connection state, retransmission, packet ordering, and congestion control Preferred Qualifications Familiarity with scripting languages, such as Python or Perl, to automate verification tasks We invite you to bring your expertise, creativity, and enthusiasm to Intel. Take the next step in your career by applying today and be part of a team that is shaping the future of technology. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: US, Arizona, Phoenix, US, California, Santa Clara Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the

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Source: https://jobsbylevel.com/jobs/senior-design-verification-engineer-at-intel-3df61b

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