# Senior FPGA Digital Design & Development Engineer (Hybrid) at Cisco

Cisco is hiring a Senior FPGA Digital Design & Development Engineer (Hybrid). It pays $155k-$225k a year and Level rates it Little AI ●○○○; you can [apply on Cisco](https://jobsbylevel.com/go/24edf1ec-7315-4586-ac84-a8c8847b8df8?utm_medium=ai-agent).

AI Level 1, AI centrality 31 out of 100. Milpitas, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 31 out of 100)
- Location: Milpitas, California, US
- Salary: $155k-$225k
- Posted: November 10, 2026
- Apply: https://jobsbylevel.com/go/24edf1ec-7315-4586-ac84-a8c8847b8df8?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=senior-fpga-digital-design-development-engineer-hybrid-at-cisco-92c93c

## Description

The application window is expected to close on: 02/25/2027 This position follows a hybrid work model and requires that you live within commuting distance of our Milpitas, CA office and commute to the office 2-3 days per week. Meet the Team The Networking Hardware Engineering (NHE) group creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. NHE serves as the execution engine for Cisco's most strategic hardware initiatives. We partner across silicon, engineering, product management, operations, supply chain, manufacturing, and executive leadership to transform technology strategy into successful product delivery. Our mission is to provide program leadership, governance, transparency, and execution difficulty across highly complex system development programs, shaping the future of hyperscale infrastructure. Cisco’s IoT team develops industrial networking products that connect and protect the infrastructure behind manufacturing, utilities, transportation, and other essential industries. Our portfolio brings together rugged switching, routing, and wireless connectivity to help customers bridge IT and operational technology, automate operations, and build resilient networks for demanding environments. Within the IoT business unit, our FPGA team develops specialized capabilities that help these products meet industrial requirements for reliability, availability, and precise timing. Our work spans Ethernet packet processing, network redundancy protocols, and precision time processing and synchronization. We also provide essential platform functionality, including hardware interfaces, clock and reset control, power sequencing, and diagnostics across multiple product families. You’ll join engineers who work closely with hardware, embedded software, and system validation teams to take designs from architecture and RTL through verification, hardware bring-up, and production release. The work combines new feature development with hands-on investigation of complex system behavior, offering meaningful technical ownership and the opportunity to see your designs contribute directly to reliable industrial operations. Your Impact As a Senior FPGA Engineer in Cisco’s IoT team, you’ll develop capabilities that help industrial networks operate reliably, maintain precise timing, and recover from disruptions. Your engineering judgment will shape product architecture, improve design quality, and help solve complex challenges across our industrial networking platforms. You’ll collaborate with hardware, embedded software, and verification teams throughout the product development cycle—from defining requirements and evaluating design approaches to validating hardware and supporting production releases. You’ll take ownership of FPGA features and subsystems while contributing to design reviews, sharing knowledge, and improving how the team develops and delivers products. Your responsibilities will include: Translate system and product requirements into FPGA architectures, detailed designs, and hardware/software interfaces. Develop and maintain RTL for packet processing, network redundancy, precision timing, and platform control functions. Define verification plans and develop simulations that validate functionality, corner cases, and recovery behavior. Perform synthesis, implementation, timing analysis, and timing closure while balancing performance and resource utilization. Collaborate with hardware and software engineers on interface definitions, initialization sequences, diagnostics, and system integration. Support hardware bring-up and troubleshoot issues using simulation waveforms, packet captures, register traces, and laboratory tools. Investigate root causes, implement corrective changes, and validate fixes across affected platforms. Deliver reproducible FPGA builds, validated release images, and clear design and release documentation. Participate in

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/senior-fpga-digital-design-development-engineer-hybrid-at-cisco-92c93c

Source: https://jobsbylevel.com/jobs/senior-fpga-digital-design-development-engineer-hybrid-at-cisco-92c93c

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