# Senior HW Engineer – PCB Layout at LumAI

LumAI is hiring a Senior HW Engineer – PCB Layout for a remote role open to applicants in United Kingdom. Level rates it Little AI ●○○○; you can [apply on Level](https://jobsbylevel.com/go/06cccc5a-2cbf-4c9a-ae10-8f5a8a75219c?utm_medium=ai-agent).

AI Level 1, AI centrality 31 out of 100. Remote (Oxford HQ).

## Details

- Company: [LumAI](https://jobsbylevel.com/companies/lumai)
- AI level: AI Level 1 (score 31 out of 100)
- Location: Remote (Oxford HQ)
- Posted: October 14, 2026
- Apply: https://jobsbylevel.com/go/06cccc5a-2cbf-4c9a-ae10-8f5a8a75219c?utm_medium=ai-agent

## Description

The Opportunity Lumai's optical engine only works if the electronics around it hold up. Our boards carry large FPGAs and custom ASICs, multi-gigabit links and fine-pitch packages, and they have to be laid out to tolerances that leave no room for guesswork. This role takes the designs coming out of our hardware and SI/PI teams and turns them into manufacturable, high-layer-count boards. The Role You will own board layout from schematic handoff to fabrication release. That covers stackups and HDI structures, controlled-impedance routing, differential pairs, length and phase matching, BGA breakout for large fine-pitch devices, and the full manufacturing package: Gerber/ODB++, drill files, assembly drawings and fabrication notes. You will also own the footprint and symbol libraries, the design rules and the CAD standards the rest of the team works to. What is genuinely hard about it is that the constraints are real and they conflict. Signal integrity, power integrity, thermal and mechanical requirements all land on the same square centimetres, and the fabricator's process limits decide what is actually buildable. You will be the person who turns simulation output into layout rules and who can defend a stackup to a fabricator. By month six, you will have taken at least one board through to fabrication release, set the libraries and design rules the team works from, and be the first point of contact for our fabricators and assembly houses. What You'll Do Lay out dense, high-layer-count PCBs from schematic through to fabrication release, using constraint-driven flows. Implement controlled-impedance routing, differential pair and length/phase matching, and HDI structures including microvias, via-in-pad and back-drilling. Plan BGA breakout and component placement for large FPGAs, custom ASICs and fine-pitch packages, balancing SI, PI, thermal and mechanical requirements. Translate SI/PI and hardware constraints into layout rules, and iterate quickly with engineers on simulation feedback. Run DFM, DFA and DFT reviews, and act as the main technical contact with PCB fabricators and assembly houses. Generate complete manufacturing outputs (Gerber/ODB++, drill files, assembly drawings, fabrication notes) and manage design revisions. Own and maintain the footprint and symbol libraries, CAD standards and design templates, compliant with IPC standards. What We're Looking For Must-have Extensive professional experience laying out complex, high-speed, high-layer-count boards, with a portfolio of designs that went into production. Expert proficiency in Cadence Allegro, including Constraint Manager. Equivalent Altium experience will also be considered. Hands-on experience with HDI technologies: microvias, via-in-pad, stacked and staggered vias, and back-drilling. Proven BGA breakout and placement for large, fine-pitch devices such as FPGAs and ASICs. Thorough working knowledge of IPC standards (IPC-2221, IPC-7351, IPC-6012) and of DFM/DFA/DFT principles. Strong preference for Boards carrying 56G+ SerDes, PCIe Gen5/6 or DDR5 interfaces. Working closely with SI/PI simulation engineers. Rigid-flex, RF or mixed-signal layouts. ECAD/MCAD collaboration on thermal and mechanical integration. Experience setting up CAD standards, libraries and design templates in a growing team. About Lumai Lumai is the optical compute company building the next generation of AI infrastructure. Spun out of optics research at the University of Oxford in 2021, we compute with light instead of electrons. Our 3D optical technology carries out the matrix multiplications at the heart of AI inside beams of light travelling through free space, which lets it go beyond the limits of both silicon GPUs and integrated photonics. In April 2026 we launched Iris Nova, the world's first optical computing system to run billion-parameter large language models in real time, using up to 90% less energy than conventional GPU-based systems. Iris Nova, the first server in the family, is now

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/senior-hw-engineer-pcb-layout-at-lumai-189da1

Source: https://jobsbylevel.com/jobs/senior-hw-engineer-pcb-layout-at-lumai-189da1

## Cite this page

Level. https://jobsbylevel.com/jobs/senior-hw-engineer-pcb-layout-at-lumai-189da1.

Get job alerts: https://jobsbylevel.com/newsletter