# Silicon Engineering Technical Lead at Cisco

Cisco is hiring a Silicon Engineering Technical Lead. It pays $172k-$245k a year and Level rates it Little AI ●○○○; you can [apply on Cisco](https://jobsbylevel.com/go/dc940129-e08b-452f-af21-2f3272fa7f1c?utm_medium=ai-agent).

AI Level 1, AI centrality 33 out of 100. Milpitas, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 33 out of 100)
- Location: Milpitas, California, US
- Salary: $172k-$245k
- Posted: November 13, 2026
- Apply: https://jobsbylevel.com/go/dc940129-e08b-452f-af21-2f3272fa7f1c?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=silicon-engineering-technical-lead-at-cisco-7a3f88

## Description

The application window is expected to close on: 11/22/2026 Meet the Team Join a team that integrates new silicon architecture, support new product development to volume production, perform manufacturing test validation, and system deployment for next-generation high-speed networking products. We work collaboratively across ASIC, optics, hardware, firmware, and manufacturing teams to deliver advanced networking solutions. Your Impact As a Silicon Engineering Technical Lead, you will conduct root-cause analysis from system-level failures down to silicon behavior. You will develop silicon validation and characterization of functional coverage, performance, stress, corner-case, and interoperability testing. Your role involves establishing silicon performance margins and operating limits, and correlating silicon characterization data with system-level behavior. You will support manufacturing failure analysis and containment of silicon, referencing failures originating from subsystems including ASIC, SerDes, Substrate, Packaging, Thermal, Firmware/SDK, and Optics. Additionally, you will influence coverage through ATE, wafer-level, and package-level testing, while working with ASIC design teams, system architects, manufacturing operations, and network systems design. Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 5 years of experience in silicon engineering, ASIC validation, or a related technical domain. Experience with silicon architecture and performance characterization. Knowledge of signal integrity and high-speed SerDes. Experience conducting root-cause analysis from system-level failures to silicon behavior. Experience with Design for Testability (DFT), scan, MBIST, LBIST, boundary scan/JTAG, and production test methodologies. Preferred Qualifications Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience with automated test equipment (ATE), wafer-level testing, and package-level testing. Experience correlating silicon characterization data with system-level behavior. Experience early silicon bring up characterization. Experience collaborating with cross-functional teams including ASIC, optics, hardware, firmware, and manufacturing. With excellent communication skills to work with stakeholders. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $171,600.00 to $245,000.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/silicon-engineering-technical-lead-at-cisco-7a3f88

Source: https://jobsbylevel.com/jobs/silicon-engineering-technical-lead-at-cisco-7a3f88

## Cite this page

Level. https://jobsbylevel.com/jobs/silicon-engineering-technical-lead-at-cisco-7a3f88.

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