# SoC Power Management Validation Engineer at Intel

Intel is hiring a SoC Power Management Validation Engineer. Level rates it Little AI ●○○○; you can [apply on Level](https://jobsbylevel.com/go/22efcc22-1896-4d15-9aeb-13f59fdbc068?utm_medium=ai-agent).

AI Level 1, AI centrality 20 out of 100. Malaysia, Penang.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 20 out of 100)
- Location: Malaysia, Penang
- Posted: October 20, 2026
- Apply: https://jobsbylevel.com/go/22efcc22-1896-4d15-9aeb-13f59fdbc068?utm_medium=ai-agent

## Prepare for this job

The job page lists 4 likely interview questions for this offer, with a CV checklist: https://jobsbylevel.com/jobs/soc-power-management-validation-engineer-at-intel-9e79da

## Description

Job Details: Job Description: The Role and Impact Join Intel's Power Management Validation team as a SoC Power Management Validation Engineer responsible for validating next-generation client platform power technologies across Idle Power Management, Active Power Management, and Overclocking features. In this role, you will drive end-to-end validation of complex power management flows spanning silicon, firmware, BIOS, operating system interactions, and platform-level behaviors. You will develop validation strategies, execute deep debug investigations, and influence product quality for power efficiency, performance scaling, residency optimization, wake latency, and overclocking robustness. Your contributions will directly impact battery life, performance-per-watt leadership, thermal efficiency, and customer experience across Intel's client platforms. Key Responsibilities • Deliver validation of SoC Power Management features including: o Package and subsystem idle states (PkgC, low power idle, S0ix) o Active power management algorithms and performance scaling o Turbo, overclocking, frequency and voltage optimization features o Power telemetry and power delivery interactions o Platform thermal and performance balancing mechanisms • Develop comprehensive validation strategies, test plans, and automated test content for power management features across silicon, firmware, BIOS, and operating system layers. • Investigate complex power-related issues including: o Idle residency escapes o Wake failures and latency issues o Power-performance regressions o Frequency scaling anomalies o Thermal throttling behavior o Overclocking stability issues • Perform and root-cause analysis using silicon debug tools, firmware traces, telemetry logs, and power measurement equipment. • Analyze power consumption, residency behavior, performance-per-watt metrics, and system-level interactions under real customer workloads. • Collaborate with architecture, design, firmware, BIOS, software, and product engineering teams to drive issue closure and feature readiness. • Develop AI-driven and automation-based validation methodologies to improve test coverage, debug efficiency, and validation velocity. • Drive power management quality signoff for major project milestones and customer enabling activities. Qualifications: Minimum Qualifications • Bachelor's or higher degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. • 3+ years of experience in post-silicon validation, system validation, power management, firmware, or platform debug. • Demonstrated understanding of SoC architecture, x86 architecture, and power management concepts including idle and active power states. • Proficiency in Python and C/C++ for automation and debug. • Proven debugging and root-cause analysis skills across silicon, firmware, BIOS, and system-level interactions. Preferred qualifications • Hands-on experience in Power Management validation, especially Idle PM, Active PM, Overclocking/Turbo, S0ix, or package power states. • Experience debugging power, performance, thermal, or frequency-scaling issues at platform level. • Familiarity with power telemetry, power delivery, and performance-per-watt optimization. • Experience with validation automation, AI-assisted debug, or data-driven validation methodologies. The ideal candidate has hands-on experience validating complex platform power management features, including low-power idle states, active power optimization, turbo/overclocking technologies, and cross-domain silicon/firmware interactions. Job Type: Experienced Hire Shift: Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status,

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