# Sort Interface Pathfinding and Development Engineer at Intel

Intel is hiring a Sort Interface Pathfinding and Development Engineer. It pays $134k-$255k a year and Level rates it Little AI ●○○○; you can [apply on Intel](https://jobsbylevel.com/go/eebbc432-3e05-4668-93da-46258a40ceb5?utm_medium=ai-agent).

AI Level 1, AI centrality 0 out of 100. US, Oregon, Hillsboro.

## Details

- Company: [Intel](https://jobsbylevel.com/companies/intel)
- AI level: AI Level 1 (score 0 out of 100)
- Location: US, Oregon, Hillsboro
- Salary: $134k-$255k
- Posted: October 23, 2026
- Apply: https://jobsbylevel.com/go/eebbc432-3e05-4668-93da-46258a40ceb5?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=sort-interface-pathfinding-and-development-engineer-at-intel-0af78b

## Prepare for this job

The job page lists 5 likely interview questions for this offer, with a CV checklist: https://jobsbylevel.com/jobs/sort-interface-pathfinding-and-development-engineer-at-intel-0af78b

## Description

Job Details: Job Description: Intel Corporation is one of the world's leading semiconductor companies, driving innovation across computing, connectivity, and artificial intelligence. With a bold vision to shape the future of technology, Intel is transforming how the world processes, stores, and communicates data. Our Advanced Packaging ,Test and Manufacturing (APTM) organization is at the forefront of this transformation, delivering industry-leading packaging and test technologies that power products across Client, Data Center, AI, Networking, and External Foundry markets. At Intel, we believe the next big thing starts with you. We are seeking a talented and driven Sort Interface Pathfinding and Development Engineer to join our Sort Interface Development team in Oregon. In this high-impact role, you will pioneer breakthrough silicon interface probing & test solutions that enable best-in-class die and wafer sort capabilities across leading-edge process nodes and advanced heterogeneous packaging platforms — including EMIB, EMIB-T, Foveros, and Foveros Direct. As Intel scales its Open System Foundry and OSAT (Outsourced Semiconductor Assembly and Test) business model, you will play an instrumental role in establishing world-class, customer-ready sort interface capabilities. You will lead electro-mechanical pathfinding, test hardware development, customer and supplier technical co-design, and probing process qualification to support both Intel's internal product roadmap and external Foundry customers. Key Responsibilities: Formulate and execute rigorous Design of Experiments (DOE) to optimize and qualify next-generation probing technologies and contact architectures for wafer and die sort operations Serve as the lead technical liaison for Foundry and OSAT customers, translating complex chiplet and package requirements into scalable sort interface specifications Author industry-standard sort design rules and Interface Design Kits (IDKs) to streamline ecosystem integration for external fabless customers and design partners Collaborate with customer design and DFT teams to architect test interface hardware, resolve technical gaps, and synchronize testability roadmaps Partner with global Test Solution vendors and PCB suppliers to pioneer state-of-the-art probing capabilities Direct supplier and pathfinding initiatives to align vendor roadmaps with internal efficiency and performance goals Drive supplier accountability and manufacturing readiness to guarantee on-time hardware delivery for critical New Product Introductions (NPI) As a Successful Candidate, You Will Bring: Collaborative mindset — you thrive working across cross-functional teams, customers, and global suppliers Strong communicator — you can translate highly technical concepts into clear, actionable specifications for diverse audiences Analytical thinker — you approach complex problems with curiosity, structure, and data-driven decision-making Self-starter — you take initiative, drive projects forward, and hold yourself and others accountable Customer-focused — you understand the importance of building trust and delivering value to external partners Adaptable — you are comfortable navigating ambiguity and evolving priorities in a fast-paced, cutting-edge environment Continuous learner — you stay current with emerging technologies and proactively seek opportunities to grow If you are passionate about pushing the boundaries of advanced packaging and test technology, and you want to make a meaningful impact on products that power the world's most advanced computing systems, we want to hear from you. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor’s degree in electrical engineering, Mechanical Engineering, Materials Science, or a related STEM field

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