# Sr. ASIC Design Verification Engineer at Cisco

Cisco is hiring a Sr. ASIC Design Verification Engineer in San Jose, United States. It pays $168k-$245k a year and Level rates it Little AI ●○○○; you can [apply on Cisco](https://jobsbylevel.com/go/7ad8b9d8-6f3e-4cf8-864d-34ce38af75de?utm_medium=ai-agent).

AI Level 1, AI centrality 33 out of 100. San Jose, California, US.

## Details

- Company: [Cisco](https://jobsbylevel.com/companies/cisco)
- AI level: AI Level 1 (score 33 out of 100)
- Location: San Jose, California, US
- Salary: $168k-$245k
- Posted: November 3, 2026
- Apply: https://jobsbylevel.com/go/7ad8b9d8-6f3e-4cf8-864d-34ce38af75de?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=sr-asic-design-verification-engineer-at-cisco-fcfb5a

## Description

The application window is expected to close on: 11/12/2026 Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Participate in the ASIC design verification for Cisco high-end switching products. Architect, develop, and maintain block, cluster, and top-level Design Verification (DV) environment infrastructure Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis. Construct testbenches components like scoreboard, agents, sequencers, and monitors. Collaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration Ensure comprehensive verification coverage through code and functional coverage implementation and review Minimum Qualifications: Bachelor's degree in electrical/computer science/computer engineering/related degree and 7+ years of related experience or Master's in electrical/computer science/computer engineering/related degree and 4+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree + 1 year of related experience. Prior experience in System Verilog and UVM. Experience with ASIC design and verification processes, debugging, methodology, and tools. Experience in verifying blocks/clusters or full chip level for ASIC. Preferred Qualifications: Hands-on experience with Ethernet protocols and high-speed SerDes interfaces Proficiency in Linux and programming languages such as C/C++ and/or Python/Perl Strong understanding of networking fundamentals and system-level architectures Working knowledge of PCIe and AXI protocols Experience with post-silicon bring-up and lab debugging Experience in data center, hyperscalers, or AI networking environments Proven contributions to industry standards or ASIC verification best practices Deep expertise in multiple protocols and large-scale SoC architectures Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco’s plan eligibility

The description is cut here. Read the full offer: https://jobsbylevel.com/jobs/sr-asic-design-verification-engineer-at-cisco-fcfb5a

Source: https://jobsbylevel.com/jobs/sr-asic-design-verification-engineer-at-cisco-fcfb5a

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