# Sr High Speed Mixed Signal Circuit Design Eng at Nokia

Nokia is hiring a Sr High Speed Mixed Signal Circuit Design Eng. Level rates it Little AI ●○○○; you can [apply on Nokia](https://jobsbylevel.com/go/7ebaca0a-4822-4f65-add8-9b5a9b176819?utm_medium=ai-agent).

AI Level 1, AI centrality 33 out of 100. United States.

## Details

- Company: [Nokia](https://jobsbylevel.com/companies/nokia)
- AI level: AI Level 1 (score 33 out of 100)
- Location: United States
- Posted: August 24, 2026
- Apply: https://jobsbylevel.com/go/7ebaca0a-4822-4f65-add8-9b5a9b176819?utm_medium=ai-agent
- Free CV review for this job: https://jobsbylevel.com/cv-review?job=sr-high-speed-mixed-signal-circuit-design-eng-at-nokia-d75116

## Description

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​ Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.​ The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed-signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design to production. Engaging in high-speed analog circuit design gives you the chance to create the technical differentiation that will allow Infinera to hold market leadership. By building cutting-edge circuitry, we will together revolutionize the era of efficient high-speed transmission. Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs; Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc. Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality; Need to support and comply with the team’s design methodologies and release flows. Mandatory Knowledge/Skills/Abilities: Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies. Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production. Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis; Must have a good understanding of device physics and the impacts of layout effects; Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS; Collaborative with other local or remote team members in a fast-paced professional environment. Preferred Knowledge/Skill/Abilities: Fluent in verbal and written communications; Independently resolves issues and conquer design challenges; Self-motivated and detail-oriented; Has the knowledge of (optical) communication theories and Matlab coding. Education and Experience Requirements: PhD EE or M.S. in E.E. with 3+ years’ experience

Source: https://jobsbylevel.com/jobs/sr-high-speed-mixed-signal-circuit-design-eng-at-nokia-d75116

## Cite this page

Level. https://jobsbylevel.com/jobs/sr-high-speed-mixed-signal-circuit-design-eng-at-nokia-d75116.

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