Level

Intel

Analog Circuit Design Engineer

Intel is hiring an Analog Circuit Design Engineer in Bengaluru, India. Level rates it ; you can apply on Level.

AI in this role

Design advanced analog circuits, power-optimized mixed-signal IPs, and perform post-silicon validation as an Analog Circuit Design Engineer at Intel.

cadence-virtuosospiceprimesimpythontclperl
Job Details:

Job Description: 

The Role and Impact:


As an Analog Circuit Design Engineer, you will play a pivotal role in designing advanced analog circuits for cutting-edge technologies. Your day-to-day work will focus on creating high-performance, power-optimized circuits for analog and mixed-signal IPs in advanced process nodes. By collaborating with cross-functional teams, you will shape Intel's ability to deliver robust and innovative solutions that meet global technology demands.

Business Group:


You will join the Central Engineering Group (CEG), a team dedicated to enabling Intel's success through world-class engineering capabilities. CEG is focused on the development of state-of-the-art technologies, contributing to Intel's leadership in innovation and product excellence.

Key Responsibilities:


- Design, develop, and optimize analog circuits for high-speed SerDes, memory interfaces, and advanced process nodes.
- Extract key chip parameters, simulate analog behavior models, and validate designs against block specifications.
- Create and execute comprehensive test plans to ensure functionality, reliability, and performance.
- Collaborate with architecture and layout teams to optimize circuits for power, area, timing, and electrical robustness.
- Perform post-silicon debug to analyze and resolve circuit issues, ensuring readiness for high-volume manufacturing.
- Continuously improve design methodologies to enhance innovation, efficiency, and turnaround times.
- Utilize industry-standard tools such as Cadence Virtuoso, SPICE simulators, and post-layout extraction tools.

Qualifications:

Minimum Qualifications:


- Bachelor's degree in Electrical Engineering or a related field with 6+ years of experience, or Master's degree with 4+ years of experience, or PhD with 2+ years of experience in analog circuit design.
- Proficiency in designing high-speed analog/mixed-signal circuits, including PLLs, SerDes, regulators, and clocking circuits.
- Expertise in CMOS design fundamentals, circuit simulation tools, and modeling.
- Experience with EDA tools such as Cadence Virtuoso, Spectre, PrimeSim, DRC, LVS, and post-layout extraction.
- Familiarity with optimizing circuits for power efficiency, area, and yield goals.

Preferred Qualifications:


- Experience in post-silicon validation, reliability testing, and debugging.
- Knowledge of scripting languages such as Python, TCL, or Perl for design automation tasks.
- Familiarity with high-speed interface interconnect modeling and simulation.
- Strong analytical and problem-solving skills, along with a demonstrated ability to lead technical initiatives.
- Proven ability to work in fast-paced environments and mentor junior engineers.

If you are excited about driving innovation and crafting impactful analog designs, we encourage you to apply and contribute to transforming technology at Intel.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

Analog Circuit Design Engineer at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Cadence VirtuosoSpicePrimesimPythonTclPerl

Questions you could be asked

  1. What's a project where you used Cadence Virtuoso hands-on?
  2. Walk me through how you've used Spice in your day-to-day work.
  3. What are the limits of Primesim that you've run into, and how did you work around them?
  4. What's a project where you used Python hands-on?
  5. Walk me through how you've used Tcl in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Cadence Virtuoso, Spice, Primesim, Python, and Tcl. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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