Level

Cisco

ASIC Design Verification Technical Leader

Cisco is hiring an ASIC Design Verification Technical Leader in San Jose, United States. It pays $187k-$268k a year and Level rates it ; you can apply on Level.

AI in this role

Lead ASIC verification planning and execution for complex networking SoCs powering core hardware platforms.

systemveriloguvmpythonperl
asic-verificationsochardware-emulationtechnical-leadership
The application window is expected to close on: 10/27/2026

This role requires being onsite in San Jose, CA at least 4 days/week.

Meet the Team

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

  • Lead the planning and execution of ASIC verification for complex networking SoCs, ensuring high-quality and predictable project execution.

  • Drive verification strategy, testplan development, coverage closure, and execution across multiple IPs and subsystem-level verification efforts.

  • Provide technical leadership and mentorship to verification engineers, promoting best practices and technical excellence.

  • Develop and enhance scalable, reusable verification environments, infrastructure, and methodologies using SystemVerilog/UVM.

  • Collaborate closely with architecture, RTL, emulation, FPGA, and post-silicon teams to enable efficient debug and successful silicon bring-up.

  • Lead complex debug efforts, perform root cause analysis, and drive issues to closure across simulation, emulation, and silicon.

  • Champion continuous improvements in verification productivity, automation, regression efficiency, and quality metrics.

  • Evaluate and adopt new verification technologies, methodologies, and industry best practices to improve verification effectiveness.

Minimum Qualifications

  • Bachelor's degree with 10+ years of related experience, or Master's degree with 7+ years of related experience, or Ph.D. with 5+ years of related experience.

  • Strong experience with SystemVerilog, UVM, and modern verification methodologies, including hardware emulation.

  • Experience developing and executing verification strategies for complex ASIC or SoC programs.

  • Experience leading verification teams or serving as the technical lead for complex verification projects.

  • Proficiency in scripting languages such as Python or Perl

Preferred Qualifications

  • Experience with Datacenter, Hyperscaler, AI, or networking ASICs.

  • Deep understanding of high-speed protocols (e.g., PCIe, Ethernet, CXL, HBM, DDR) and large-scale SoC architectures.

  • Hands-on experience with hardware emulation platforms such as FPGA prototyping, Cadence Palladium, Siemens Veloce/StratoCS, or Synopsys ZeBu.

  • Experience with silicon bring-up, post-silicon validation, and debug.

  • Experience optimizing verification productivity, regression infrastructure, and automation.

  • Strong technical leadership, communication, collaboration, and mentoring skills

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks.  Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

  • Additional paid time away may be requested to deal with critical or emergency issues for family members

  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;

  • 1% of incentive target for each 1% of attainment between 75% and 100%; and

  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$186,900.00 - $307,800.00

Non-Metro New York state & Washington state:

$166,300.00 - $274,100.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

How we rate this

ASIC Design Verification Technical Leader at Cisco rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Asic VerificationSocHardware EmulationTechnical LeadershipSystemverilogUvmPythonPerl

Questions you could be asked

  1. Tell me about a project where asic verification was part of your work. What did you do?
  2. Tell me about a project where soc was part of your work. What did you do?
  3. Tell me about a project where hardware emulation was part of your work. What did you do?
  4. Tell me about a project where technical leadership was part of your work. What did you do?
  5. Walk me through how you've used Systemverilog in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Asic Verification, Soc, Hardware Emulation, Technical Leadership, and Systemverilog. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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