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Riverlane

Hardware Engineering Internship 2027

Riverlane is hiring a Hardware Engineering Internship 2027 in Cambridge, United Kingdom. It pays £30k-£35k a year and Level rates it ; you can apply on Level.

Level's read on this job

  • On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
  • The posting mentions Fpga, hardware engineering and quantum computing among its tools and skills.
  • Level classes it as an internship.
  • Riverlane has 35 other open roles on Level.
  • This posting went up within the past two weeks.

AI in this role

Investigate architectural optimisations and enhance decoder performance for quantum error correction hardware.

fpga
hardware-engineeringquantum-computingarchitecture-optimizationpython

Hardware Engineering Internship 2027

Cambridge, UK | Full-time | Fixed-term, 10–12 weeks | Hybrid

Salary: £30,000–£35,000 per annum, depending on experience, paid pro rata for the internship duration.

About us 

Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved.  Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.  

Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We’re making remarkable progress and growing fast.  

About the role 

Our full-time summer internships give current students in technical fields the opportunity to apply their skills and expertise in an industrial setting. 

You will join us at our head office in Cambridge, UK, for 10 to 12 weeks, working alongside talented software and hardware engineers, mathematicians, quantum information theorists and physicists who are experts in their fields. 

You will have a dedicated supervisor and work on a project designed to make the best use of your existing skills while developing your knowledge of quantum computing and quantum error correction. We will support you in producing a meaningful piece of work that you can be proud of by the end of your internship. 

Previous interns have committed code to industry-standard open-source compilers, co-authored research papers and led the design of new software tools. 

What you will do

  • Collaborate with experienced hardware and software engineers to investigate and evaluate architectural optimisations 
  • Enhance the decoder’s architecture to improve its flexibility and processing speed 
  • Explore different design approaches and evaluate their potential benefits 
  • Contribute to design decisions involving space and time trade-offs, balancing functionality, resource use and performance 
  • Communicate your work clearly through technical discussions, presentations and written documentation 
  • Develop your understanding of FPGA development, quantum computing and quantum error correction 

What we need 

  • You must be a current student at the time of application, either: 
    • In the second or a later year of a Bachelor’s degree 
    • Partway through a Master’s degree
    • Partway through a PhD 
  • You must be studying Computer Science, Electronic Engineering, Physics, Mathematics or another related technical subject 
  • Proficiency in Python 
  • A solid understanding of low-level computer architecture 
  • Excellent critical-thinking and problem-solving skills 
  • Strong written and verbal communication skills 
  • The ability to take initiative and work effectively as part of a team 
  • A willingness to learn about FPGA development, quantum computing and quantum error correction 
  • Availability to work full-time for 10 to 12 weeks  

Even better if… 

  • You have experience with RTL development for FPGA or ASIC systems 
  • You are familiar or interested in quantum computing  
  • You understand optimisation concepts and performance trade-offs 
  • You have some knowledge of networking principles 
  • You have experience using version control, testing or debugging tools 

Important notes 

  • You must already have the right to work in the UK for the full duration of the internship. If you hold a UK student visa, please check that its conditions allow you to undertake this full-time internship.

  • PhD students may need to temporarily step away from their PhD to complete the internship. This may affect their right-to-work status, and applicants should check their individual circumstances 
  • You must be available to work full-time for 10 to 12 weeks during the summer vacation period 
  • You will be required to sign an agreement assigning ownership of any intellectual property produced during your internship to Riverlane 
  • Internships are based at our head office in Cambridge, UK 

How to apply 

Please upload a CV and covering letter here. Your CV should include the grades that you have so far received in your degree(s). The covering letter should explain why you are applying for the internship and what skills and experience you can bring to the role. 

Deadline 

Please submit your application by Friday 6th November. Interviews will be held in Cambridge (or virtually if required). 

What can you expect from us 

Alongside a competitive salary, we offer private medical insurance, a health cash plan and life assurance, as well many other benefits.

You can also expect a diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 25 different nationalities. 

If you have any queries, please contact jobs@riverlane.com. Please do not send your applications to this email address, all applications should be submitted via our careers page.

Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity. 

Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements.  If this applies to you, we still encourage you to apply - you may be a great fit, even if you don’t meet every single qualification. We’d love to hear from you. 

If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.

GDPR notice: Riverlane collects and processes personal data in accordance with applicable data protection laws. If you are a European Job Applicant see the privacy notice for further details.

 

How we rate this

Hardware Engineering Internship 2027 at Riverlane rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Hardware EngineeringQuantum ComputingArchitecture OptimizationPythonFpga

Questions you could be asked

  1. Tell me about a project where hardware engineering was part of your work. What did you do?
  2. Tell me about a project where quantum computing was part of your work. What did you do?
  3. Tell me about a project where architecture optimization was part of your work. What did you do?
  4. Tell me about a project where python was part of your work. What did you do?
  5. Walk me through how you've used Fpga in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Hardware Engineering, Quantum Computing, Architecture Optimization, Python, and Fpga. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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