Level

Intel

Packaging Module Development Engineer

AI in this role

IP Design Verification Engineer responsible for ensuring functional quality and verification of advanced Intel IP technologies.

pythonperlsystemveriloguvmovmaxiahbapb
design-verificationrtlhardware-verificationchip-design
Job Details:

Job Description: 

  • Process Development Engineer Role in Solder Ball Attach or Chip Attach Process in Technology Development Organization.
  • CAM/SLAM Process covers Die and DRAM Attach, Component Attach, Solder Ball Attach and Deflux Process.
  • Candidate will focus on Process and Technology Development for Electronic packaging assembly process on New Product and Test Vehicle.
  • Technical knowledge in Research and Development, Process Development, Process Engineering, Design of Experiment (DOE), Statistical Process Control (SPC), Failure Modes/Effects Analysis (FMEA), Quality, Yield Improvement, Optimization.
  • Pathfinding, developing, qualifying, and ramping materials to transfer to high volume manufacturing process in factories.
  • Develops process specifications applying principles for design of experiments and data analysis, and documents improvements through white papers.
  • Optimizes and improves the efficiency of manufacturing of packages, developing processes to meet quality, reliability, cost, yield, productivity and manufacturability requirements.
  • Conducting fundamental studies and performing experiments to characterize materials, process, identify potential failure modes, understand the performance interactions, optimization, assess feasibility of technology use on product, and make technology recommendations.
  • Collaborating closely with other cross-functional team to build material technologies on test vehicles and products and assessing their performance.

Qualifications:

  • BEng/MEng/MSc/PhD degree in relevant engineering disciplines (Mechanical, Materials, Chemical, Electrical, Physics, Mechatronics),
  • Research and Development background from MSc/PhD is preferred.
  • 5 years working experience in electronic packaging AND/OR development experience is preferred.
  • Research and Development background and experience in Chip Attach, Deflux or Ball Attach Process.
  • Excellent influencing, written and verbal communication skills.
  • Strong data analysis capabilities and problem solving skills.
  • Proactive and positive approach towards challenges.
  • Able to work under tight timelines and schedules, and perform under pressure.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Kulim

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we score this

Packaging Module Development Engineer at Intel scores 0 out of 100 on AI centrality, which makes it AI Level 1 of 4 (Little AI) on this board. The level measures how much of the work is AI, not seniority.

Classification

AI Level 1. The work itself involves no AI, or AI only appears as scenery, such as a company tagline.

  1. AI Level 480 to 100
  2. AI Level 360 to 79
  3. AI Level 240 to 59
  4. AI Level 10 to 39

Bands come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

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Skills and AI tools this role asks for

Design VerificationRtlHardware VerificationChip DesignPythonPerlSystemverilogUvm

Questions you could be asked

  1. Tell me about a project where design verification was part of your work. What did you do?
  2. Tell me about a project where rtl was part of your work. What did you do?
  3. Tell me about a project where hardware verification was part of your work. What did you do?
  4. Tell me about a project where chip design was part of your work. What did you do?
  5. Walk me through how you've used Python in your day-to-day work.

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  • List these exact terms on your resume: Design Verification, Rtl, Hardware Verification, Chip Design, and Python. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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