PMU Verification Engineer - New College Graduate, 2027
NVIDIA is hiring a PMU Verification Engineer - New College Graduate, 2027 in Shanghai, China. Level rates it ; you can apply on Level.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- Tools and skills the posting cites include Verilog, Systemverilog and digital design.
- Level files it as a junior role.
- Level lists 2,700+ other open roles at NVIDIA.
- The role was posted within the past week.
AI in this role
Verify the NVTHERM thermal management IP at the SoC level for Tegra autonomous driving platforms as a recent graduate.
NVIDIA's Tegra is one of the most complex SoCs we build, powering autonomous driving platforms where safety, reliability, and thermal robustness are critical. NVTHERM is the thermal management IP responsible for temperature sensing, thermal protection, and thermal response across the SoC, a core piece of keeping the chip safe and performant under real world operating conditions.
We are looking for a Design Verification NCG to join our team and take ownership of NVTHERM IP verification at the SoC level within Tegra.
What you will be doing:
Verify the NVTHERM IP at the SoC level, ensuring correct thermal sensing, thermal response, and protection behavior in the context of the full Tegra SoC.
Ramp up on the SoC verification environment, understand how the testbench, existing legacy test cases, and simulation flow fit together.
Learn the coverage flow used for signoff, including how functional and code coverage are collected and reviewed.
Analyze current coverage against the legacy case suite, identify coverage holes, and update or add test cases to close them.
Work closely with your mentor and the SoCV team to understand verification priorities and signoff requirements.
What we need to see:
Recent graduate with a masters degree in Electrical Engineering, Computer Engineering, or a related field.
Basic understanding of digital design and verification concepts (RTL, testbenches, simulation).
Familiarity with Verilog/SystemVerilog is a plus.
Strong analytical skills and attention to detail, comfortable digging into coverage reports and test results to find gaps.
Good communication skills and eagerness to learn in a fast paced, complex SoC environment.
How we rate this
PMU Verification Engineer - New College Graduate, 2027 at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where digital design was part of your work. What did you do?
- Tell me about a project where verification was part of your work. What did you do?
- Tell me about a project where soc was part of your work. What did you do?
- Tell me about a project where thermal management was part of your work. What did you do?
- Walk me through how you've used Verilog in your day-to-day work.
Adapt your resume
- List these exact terms on your resume: Digital Design, Verification, Soc, Thermal Management, and Verilog. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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