Level

Intel

Process Integration, Yield and Defect Reduction Engineering Lead

AI in this role

Lead process integration, yield, and defect reduction teams for advanced semiconductor packaging manufacturing operations.

sqljmp
process-integrationyield-optimizationdefect-reductionstatistical-process-controlsemiconductor-manufacturing
Job Details:

Job Description: 

The New Mexico Silicon Manufacturing (NM Si Manufacturing) Integration Team is seeking a highly motivated engineering professional with a strong technical background to grow into a Process Integration (PI) Team Lead role. This position reports directly to the NM Si Manufacturing Integration Director and offers the opportunity to lead teams of technical contributors supporting Intel's advanced packaging manufacturing operations.

In this role, you will collaborate closely with Advanced Packaging High-Volume Manufacturing (HVM) engineering and factory operations teams to support the transfer, ramp, and sustainment of advanced packaging technologies. You will play a critical role in ensuring successful execution against foundry customer commitments while driving continuous improvements in yield, quality, reliability, and manufacturing efficiency.

The ideal candidate will have a proven track record of technical leadership, innovation, and cross-functional collaboration. Success in this position requires strong problem-solving skills, the ability to influence across organizations, and a passion for enabling technology development in a high-volume manufacturing environment.

Qualifications:

Minimum Qualifications:

  • Bachelor's or Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Materials Science, Microelectronics Engineering, Chemistry, Physics, or a related technical field.
  • 5+ years of experience in semiconductor manufacturing or advanced packaging.
  • In addition, candidates should possess experience in one or more of the following areas:
    • 5+ years of experience in process integration or defect reduction for backend interconnect or advanced packaging processes.
    • 3+ years of experience applying Design of Experiments (DOE) methodologies.
    • 5+ years of experience in data analysis and statistical process control using tools such as JMP, SQL, PCS, or similar platforms.

Preferred Qualifications:

Technical Skills and Experience

  • Strong understanding of semiconductor manufacturing process flow and advanced packaging technologies.
  • Knowledge of process capability analysis, specification management, statistical variation, and process control methodologies.
  • Proven ability to analyze defectivity and parametric data to identify yield limiters and drive process improvements.
  • Experience with yield analysis and defect reduction methodologies.
  • Experience applying Failure Modes and Effects Analysis (FMEA) techniques.
  • Experience developing inline monitoring systems, dashboards, and manufacturing health metrics.

Leadership and Problem Solving

  • Demonstrated success leading technology development, transfer, and manufacturing ramp activities.
  • Proven ability to solve complex technical challenges using innovative and data-driven approaches.
  • Strong project management, communication, and stakeholder management skills.
  • Ability to lead cross-functional teams and influence technical decisions across multiple organizations.
  • Experience driving operational excellence, yield improvement, and manufacturing efficiency initiatives.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $140,830.00-198,820.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we score this

Process Integration, Yield and Defect Reduction Engineering Lead at Intel scores 0 out of 100 on AI centrality, which makes it AI Level 1 of 4 (Little AI) on this board. The level measures how much of the work is AI, not seniority.

Classification

AI Level 1. The work itself involves no AI, or AI only appears as scenery, such as a company tagline.

  1. AI Level 480 to 100
  2. AI Level 360 to 79
  3. AI Level 240 to 59
  4. AI Level 10 to 39

Bands come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Process IntegrationYield OptimizationDefect ReductionStatistical Process ControlSemiconductor ManufacturingSqlJmp

Questions you could be asked

  1. Tell me about a project where process integration was part of your work. What did you do?
  2. Tell me about a project where yield optimization was part of your work. What did you do?
  3. Tell me about a project where defect reduction was part of your work. What did you do?
  4. Tell me about a project where statistical process control was part of your work. What did you do?
  5. Tell me about a project where semiconductor manufacturing was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Process Integration, Yield Optimization, Defect Reduction, Statistical Process Control, and Semiconductor Manufacturing. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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