Senior IP Design Verification Engineer - XBAR IP

AI in this role

Verify ASIC design and architecture of memory subsystems for next-generation GPUs and AI-focused SOCs.

verilogsystemveriloguvmvmm

design-verificationasicfunctional-coveragedebugging

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of memory subsystem units for the world’s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.”

What you’ll be doing:

You will be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies.
Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Coming up come up with test plans, tests and verification infrastructure for complex IPs/sub-systems.
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
Work on advanced verification methodologies like SV/UVM.
Perform functional coverage driven verification closure.
Working with architects, designers, and pre and post silicon verification teams to accomplish your tasks.

What we need to see:

B.Tech./ M.Tech., or equivalent experience.
4+ years of relevant experience.
Experience in verification of complex IPs/units and sub-systems.
Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies.
Expertise in Verilog.
Knowledge in SystemVerilog or similar HVL / UVM or VMM.

Ways to stand out from the crowd:

Experience in memory subsystem or network interconnect IP verification.
Debugging and analytical skills with sound scripting knowledge.
Good communication and excellent team player.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

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How we rate this

Senior IP Design Verification Engineer - XBAR IP at NVIDIA rates 80 out of 100 for how much of the daily work is AI. That makes it Builds AI (AI Level 4 of 4). The level is about AI in the job, not seniority.

Classification

Builds AI. The job is building AI systems.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Key facts

Senior IP Design Verification Engineer - XBAR IP is an open job at NVIDIA.
Level rates this role AI Level 4 of 4: Builds AI.
The role is based in India, Bengaluru.
The job was posted on October 6, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Design VerificationAsicFunctional CoverageDebuggingVerilogSystemverilogUvmVmm

Questions you could be asked

Tell me about a project where design verification was part of your work. What did you do?
Tell me about a project where asic was part of your work. What did you do?
Tell me about a project where functional coverage was part of your work. What did you do?
Tell me about a project where debugging was part of your work. What did you do?
Walk me through how you've used Verilog in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Design Verification, Asic, Functional Coverage, Debugging, and Verilog. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.
Lead with what you built, trained or shipped — this role is judged on the AI system itself, not the tools around it.

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