GPU Logic Design Engineer

Intel is hiring a GPU Logic Design Engineer in Bengaluru, India. Level rates it ; you can apply on Level.

AI in this role

Design and verify RTL logic for GPU IP blocks supporting graphics, compute, and AI workloads at Intel.

rtlverilogsystemverilogeda-toolsatpg

logic-designrtl-codingsimulationverificationdft

Job Details:

Job Description:

The Role and Impact
As a GPU Logic Design Engineer, you will play a pivotal role in developing and refining the graphics IPs that drive Intel's cutting-edge GPUs. You will be responsible for designing, coding, and simulating register transfer level (RTL) logic for critical GPU IP blocks, ensuring they meet stringent power, performance, area, and timing goals. Your contributions will directly impact the quality and functionality of Intel's GPUs, enabling unparalleled visual experiences for users worldwide.

Business Group
The Data Center Group (DCG) is at the heart of Intel's mission to power the future of computing. Focused on advancing data-centric solutions, DCG develops innovative hardware and software technologies that accelerate workloads for AI, cloud, and enterprise systems. Within this group, the AI SOC SCAN ATPG organization is dedicated to ensuring the delivery of high-quality, high-performance GPU designs that support Intel's leadership in graphics and visual computing.

Key Responsibilities
- Develop logic design and write RTL code for GPU IP blocks, focusing on graphics, compute, display, and media.
- Collaborate in defining the architecture and microarchitecture features of GPU blocks.
- Optimize logic designs to meet power, performance, area, and timing goals for physical implementation.
- Review verification plans and drive unit-level verification to ensure correctness of design features.
- Resolve RTL test failures and implement corrective measures to guarantee feature integrity.
- Support SoC customers in integrating and verifying GPU blocks for high-quality SoC designs.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 3+ years of industry experience; OR Master's degree in the same fields, with 2+ years of industry experience; OR PhD with no industry experience.
- Hands-on experience with at least one key DFT feature, such as TAP/JTAG, Scan/ATPG, or Array DFT (MBIST/PBIST).
- Proficiency in using EDA tools such as ATPG tools, Mentor Tessent shell, and VCS simulation/debug tools.
- Background in silicon enabling, debug, or test pattern development.

Preferred Qualifications
- Proficiency in programming or scripting languages for design automation.
- Familiarity with structural design flows, including timing analysis, routing, placement, or clocking.
- Knowledge of high-volume manufacturing requirements and test flows.
- Understanding of 3D, media, and display graphics pipelines.
- SoC architecture expertise.

Join us to shape the future of graphics and visual computing. Bring your expertise to Intel's GPU Hardware IP team, where innovation meets impact.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

GPU Logic Design Engineer at Intel rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Key facts

GPU Logic Design Engineer is an open job at Intel.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in India, Bangalore.
The job was posted on October 14, 2026.
Seniority: mid.
Applications are handled by Intel. Apply on Intel

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Logic DesignRtl CodingSimulationVerificationDftRtlVerilogSystemverilog

Questions you could be asked

Tell me about a project where logic design was part of your work. What did you do?
Tell me about a project where rtl coding was part of your work. What did you do?
Tell me about a project where simulation was part of your work. What did you do?
Tell me about a project where verification was part of your work. What did you do?
Tell me about a project where dft was part of your work. What did you do?

Adapt your resume

List these exact terms on your resume: Logic Design, Rtl Coding, Simulation, Verification, and Dft. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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