SOC Design Engineer

AI in this role

Design and optimize front-end SoC technology using RTL coding and logic design methodologies.

system-verilogverilogrtl

logic-designrtl-codingsoc-development

Job Details:

Job Description:

The Role and Impact
As a SoC Logic Design Engineer, you will play a vital role in developing and optimizing the front-end design for Intel's cutting-edge System-on-Chip (SoC) technology. Day-to-day, you will focus on register transfer level (RTL) coding, logic design, and integration of IP components to deliver high-quality SoCs. Your work will directly impact Intel's ability to deliver innovative solutions that power exceptional user experiences across diverse devices such as laptops, desktops, and tablets.

Business Group
You will be part of Intel Corporation's dynamic engineering group, where innovation drives the creation of state-of-the-art chipsets and SoC designs. This team is committed to pushing technological boundaries and delivering best-in-class solutions for Intel's global product portfolio. As a member of this group, you will contribute to Intel's mission of enhancing computing performance and efficiency while shaping the future of technology.

Key Responsibilities

Develop and implement logic design, RTL coding, and simulation for SoC designs.
Integrate and validate IP blocks and subsystems into complete SoC architectures.
Perform quality checks to ensure power, performance, timing, and design integrity goals are met.
Collaborate with IP providers and cross-functional teams to resolve RTL test failures and ensure functionality.
Review verification plans and ensure architectural features are properly validated.
Apply secure development practices to address security objectives within the design.

Qualifications:

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Systems Engineering, or a related field.
0-1 years of hands-on experience in logic design, RTL coding, or SoC development, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training.
Proficiency in System Verilog, Verilog, or similar hardware description languages.
Understanding of RTL integration and validation methodologies.

Preferred Qualifications

Master's degree in a relevant field with no prior professional experience required.

Strong analytical and problem-solving skills with the ability to debug complex designs.

Effective communication skills to collaborate with cross-site teams and stakeholders.

Prior experience with IP interoperability and SoC design workflows.

Familiarity with documentation processes, such as test plan creation and coverage analysis.

We are excited to connect with talented individuals who are passionate about cutting-edge technology and eager to contribute to Intel's next-generation innovations. Join us in shaping the future of computing.

Job Type:

College Grad

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

SOC Design Engineer at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Logic DesignRtl CodingSoc DevelopmentSystem VerilogVerilogRtl

Questions you could be asked

Tell me about a project where logic design was part of your work. What did you do?
Tell me about a project where rtl coding was part of your work. What did you do?
Tell me about a project where soc development was part of your work. What did you do?
What's a project where you used System Verilog hands-on?
Walk me through how you've used Verilog in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Logic Design, Rtl Coding, Soc Development, System Verilog, and Verilog. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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