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Nokia

Analog Layout Engineer

Nokia is hiring an Analog Layout Engineer. Level rates it ; you can apply on Nokia.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • Level classifies it as a senior role.
  • Level lists 576 other open roles at Nokia.

AI in this role

The successful candidate shall utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent analog matching performance, area and power requirements. He or she shall will be working on the latest process technologies. He or she shall work closely with circuit designers to generate high-quality layout in a highly efficient way. 

 

  • Work close with circuit designers to optimize the floor plan;
  • Perform daily layout editing, DRC/LVS tasks to ensure the quality of the layout;
  • Create a solid power grid for better power integrity;
  • Work with the circuit designers to optimize the quality of the layout, including but not limited to matching and signal integrity;
  • Employ efficient design methodologies to reduce the number of iterations and to deliver the product promptly.
     

Mandatory Knowledge/Skills/Abilities:

  • Extremely familiar with layout editing tools, such as Virtuoso;
  • Highly proficient with DRC/LVS/ERC related tools and flows, such as Calibre, PVS (or IC Validator);
  • Have extensive experience designing layout in deep sub-micron CMOS technologies, especially FinFET technologies (7nm and 5nm);
  • Decent understanding in the issues of  electro-migration and IR drop, RC delay, self-heating, capacitive cross-talk, etc.;
  • Decent understanding in analog layout requirements, such as matching and shielding;
  • Knowledge in automatic P&R or chip-level floor planning and chip-level layout integration.

Preferred Knowledge/Skill/Abilities:

  • Decent Understanding in analog design methodologies, including the use of layout constraints;
  • Knowledge in performing RC extraction and EM/IR analysis;
  • Knowledge in CAD tool setup and maintenance;
  • Ability to generate pCell and pyCell to facilitate layout design;
  • Excellent communication skills and team spirit to work with members across multiple sites and functionalities;
  • Experience in designing layout for high-speed, high-performance analog, and mixed-signal circuits.

Education and Experience Requirements:

  • 5-10 years' experience in analog and mixed signal layout design.

    歡迎身障求職者

How we rate this

Analog Layout Engineer at Nokia rates 26 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

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