Level

NVIDIA

ASIC Design Engineer - New College Grad 2027

NVIDIA is hiring an ASIC Design Engineer - New College Grad 2027 in Santa Clara, United States. It pays $100k-$167k a year and Level rates it ; you can apply on Level.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • Tools and skills the posting cites include Verilog, C and Python.
  • Level files it as a junior role.
  • Level lists 2,700+ other open roles at NVIDIA.

AI in this role

Implement high-performance RTL and micro-architectures for GPUs and SoCs supporting AI computing.

verilogcpythonperl
asic-designrtlmicro-architecturelogic-synthesistiming-analysisvlsi

Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! 


We are seeking an ASIC Design Engineer - New College Graduate to implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.


What you'll be doing:

  • As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
  • Analyze architectural trade-offs based on features, performance requirements and system limitations.
  • Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
  • Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines.
  • Architect features to help silicon debug and support post-silicon validation activities.

What we need to see:

  • Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Engineering or Computer Science or related field or equivalent experience
  • Knowledge of micro-architecture and RTL development (Verilog).
  • Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic is required.
  • Strong interpersonal skills and an excellent teammate.

Ways to stand out from the crowd:

  • Strong C/C++, Python or Perl skills.
  • Good debugging and analytical skills.
  • Experience with arbiters, scheduling, synchronization & bus protocols, interconnect networks, caches 

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 100,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750 USD for Level 2.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until October 2, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

How we rate this

ASIC Design Engineer - New College Grad 2027 at NVIDIA rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Asic DesignRtlMicro ArchitectureLogic SynthesisTiming AnalysisVlsiVerilogC

Questions you could be asked

  1. Tell me about a project where asic design was part of your work. What did you do?
  2. Tell me about a project where rtl was part of your work. What did you do?
  3. Tell me about a project where micro architecture was part of your work. What did you do?
  4. Tell me about a project where logic synthesis was part of your work. What did you do?
  5. Tell me about a project where timing analysis was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Asic Design, Rtl, Micro Architecture, Logic Synthesis, and Timing Analysis. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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