Level

Cisco

ASIC DFT Technical Leader

Cisco is hiring an ASIC DFT Technical Leader in San Jose, United States. It pays $187k-$268k a year and Level rates it ; you can apply on Cisco.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • The posting mentions Jtag, Scan and Bist among its tools and skills.
  • Level classes it as a lead role.
  • Cisco has 1,400+ other open roles on Level.
  • Posted in the last few days.

AI in this role

Lead ASIC Design for Test (DFT) initiatives for next-generation networking chips in the Silicon One group.

jtagscanbistatpgtestmaxtetramaxtessentprimetimevcssystem-verilogverilog


Meet the Team:


The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware pltforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. 



Your Impact:


You will be in the Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.

Minimum Qualifications:


  • Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 10 years of experience.
  • Prior experience working in the latest innovative trends in DFT, test and silicon engineering.
  • Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
  • Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
  • Prior experience working with Gate level simulation, debugging with VCS and other simulators.
  • Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687

Preferred Qualifications:


  • Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
  • DFT CAD development - Test Architecture, Methodology and Infrastructure
  • Test Static Timing Analysis
  • Post silicon validation using DFT patterns.
  • Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks.  Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

  • Additional paid time away may be requested to deal with critical or emergency issues for family members

  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;

  • 1% of incentive target for each 1% of attainment between 75% and 100%; and

  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$186,900.00 - $307,800.00

Non-Metro New York state & Washington state:

$166,300.00 - $274,100.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

How we rate this

ASIC DFT Technical Leader at Cisco rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

JtagScanBistAtpgTestmaxTetramaxTessentPrimetime

Questions you could be asked

  1. What's a project where you used Jtag hands-on?
  2. Walk me through how you've used Scan in your day-to-day work.
  3. What are the limits of Bist that you've run into, and how did you work around them?
  4. What's a project where you used Atpg hands-on?
  5. Walk me through how you've used Testmax in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Jtag, Scan, Bist, Atpg, and Testmax. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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