ASIC Engineer Intern, Annapurna Labs - 2027

Amazon is hiring an ASIC Engineer Intern, Annapurna Labs - 2027 in Cupertino, United States. It pays $116k a year and Level rates it ; you can apply on Amazon.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Tools and skills the posting cites include Verilog, SystemVerilog and rtl design.
Level classifies it as an internship.
Level lists 20,000+ other open roles at Amazon.

AI in this role

ASIC engineering intern contributing to custom silicon design and verification for hardware accelerators.

VerilogSystemVerilog

rtl-designasichardware-verificationchip-architecture

At Amazon, our tech isn't just a tool, it's your playground. Our engineers work on scalable systems, cloud services, and customer-facing products that operate at global scale. This is an environment where you learn by building. Whether you're creating cloud-native solutions, optimizing machine learning models, or building products that drive experiences for millions of customers around the globe, your work reaches the world, fast. You'll take ownership early, collaborate across teams and disciplines, and grow your skills as you tackle new problems. There's no single path forward here, with a chance to explore different directions and shape your journey as you go. This is where ambition meets opportunity and, where the impact of what you build helps define what comes next, for customers and for you.

What's in it for you? An internship at Amazon means real responsibility from day one. You'll build, test, and learn alongside people who want to see you succeed, while making an impact that reaches far beyond campus.

About the team
Annapurna Labs designs the custom silicon at Amazon - including Graviton (our server processors), Trainium and Inferentia (our machine learning training and inference accelerators), and the Nitro system that powers modern EC2. We own the full stack, from silicon through the software that makes it work (compilers, runtimes, drivers, and the frameworks that let customers run workloads on our hardware). As a Software Development Engineer Intern, you'll write the software that turns custom silicon into products used by millions.

Annapurna has ASIC teams across a range of products and disciplines, and we work to place you on a technical team aligned with your interests and strengths. Example teams and focus areas include:

- RTL design for machine learning accelerators (Trainium/Inferentia)
- Design verification and functional validation
- Physical design, timing closure, and place-and-route
- SoC integration and chip architecture
Throughout the interview process, we will partner with you and our hiring managers to match you to a team where your background and interests fit best, so your project is something you're genuinely excited to work on.

As an ASIC Engineer Intern, you'll contribute to real chip development work, which may include:

- Designing and implementing RTL for digital logic blocks using Verilog/SystemVerilog
- Developing and running verification environments to validate design functionality and coverage
- Supporting synthesis, timing analysis, and physical design flows
- Debugging design issues through simulation and analysis
- Collaborating with architecture, verification, and physical design teams to take features from specification to silicon
- Documenting your design decisions and presenting your work to the team

You'll be paired with a mentor and manager who will help scope your project, support your growth, and set you up to deliver meaningful, measurable impact by the end of your internship.

Basic qualifications

- Currently enrolled in a Bachelor's or Master's degree program in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with a final graduation date of December 2027 or later
- Coursework or project experience in digital logic design and computer architecture
- Familiarity with a hardware description language (Verilog, SystemVerilog, or VHDL)
- Understanding of fundamental digital design concepts: combinational and sequential logic, finite state machines, timing, and clocking

Preferred qualifications

- Experience in practical semiconductor ASIC design work including owning end-to-end design of major SOC blocks
- Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments, and system testing
- Experience working with fast-moving, high-performance teams and driving innovative solutions tailored to unique business environments
- Can show strong verbal and written communication skills
- Pursuing a degree with a focus on VLSI, digital design, or computer architecture
- Experience with industry-standard EDA tools (Cadence, Synopsys, or equivalent)
- Scripting experience (Python, Perl, TCL, or shell) for automation and design flows
- Prior internship, research, or lab experience in chip design, embedded systems, or hardware development

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The starting pay for this position is listed below. Starting Day 1 of employment, Amazon offers EAP, Mental Health Support, Medical Advice Line, 401(k) matching. Learn more about our benefits at https://hiring.amazon.com/why-amazon/benefits.

Austin, TX, USA - 116,100.00 USD Annually
Cupertino, CA, USA - 133,600.00 USD Annually
Seattle, WA, USA - 116,100.00 USD Annually

How we rate this

ASIC Engineer Intern, Annapurna Labs - 2027 at Amazon rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

ASIC Engineer Intern, Annapurna Labs - 2027 is an open job at Amazon.
Level rates this role AI Level 1 of 4: Little AI.
The listed salary is $116k a year.
The role is based in US, CA, Cupertino.
The job was posted on August 27, 2026.
Seniority: intern.
Applications are handled by Amazon. Apply on Amazon

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Rtl DesignAsicHardware VerificationChip ArchitectureVerilogSystemVerilog

Questions you could be asked

Tell me about a project where rtl design was part of your work. What did you do?
Tell me about a project where asic was part of your work. What did you do?
Tell me about a project where hardware verification was part of your work. What did you do?
Tell me about a project where chip architecture was part of your work. What did you do?
Walk me through how you've used Verilog in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Rtl Design, Asic, Hardware Verification, Chip Architecture, and Verilog. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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