ASIC Engineer, Networking Chip Design - New College Grad 2027
NVIDIA is hiring an ASIC Engineer, Networking Chip Design - New College Grad 2027 in Shanghai, China. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- NVIDIA has 2,700+ other open roles on Level.
- Posted in the last few days.
AI in this role
We are now looking for Chip Design Engineer for the Switch Silicon group. As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
- Work in a combined design and verification team which develops some of the switch silicon core units specializing in quality of service.
- Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
- Build reference models, verify and simulate chip blocks/entities according to specifications.
- Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
What we need to see:
- Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
- A team player with good communication and interpersonal skills.
- Previous experience in RTL design or RTL verification – an advantage.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field.
How we rate this
ASIC Engineer, Networking Chip Design - New College Grad 2027 at NVIDIA rates 30 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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