ASIC Engineering Intern, Networking Chip Design - 2027
NVIDIA is hiring an ASIC Engineering Intern, Networking Chip Design - 2027 in Shanghai, China. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- Tools and skills the posting cites include Python, Perl and rtl design.
- Level classifies it as an internship.
- Level lists 2,700+ other open roles at NVIDIA.
AI in this role
Develop automation infrastructure, test facilities, and RTL verification for next-generation networking switch silicon chips as an engineering intern.
We are now looking for Chip Design Internships for the Switch Silicon group. As a Chip Design Intern at NVIDIA's Networking business unit, you'll join a group of passionate engineers to implement the next generation state of the art Switch Silicon chips. In this intern position, you'll be part of a dynamic, technology-focused company while closely engaged with developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Understand the fullchip working flow and build infrastructure for better automation, efficiency.
Work in a combined design and verification team and develops test facilities for quality assurance.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
What we need to see:
Pursuing BS / MS in electrical / computer engineering and related.
A team player with quick learning, good communication and interpersonal skills.
Fluent English (both written and spoken).
Experience in RTL design or RTL verification is a plus.
Strong scripting skills, Python/Perl is a plus.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field.
How we rate this
ASIC Engineering Intern, Networking Chip Design - 2027 at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where rtl design was part of your work. What did you do?
- Tell me about a project where rtl verification was part of your work. What did you do?
- Tell me about a project where asic was part of your work. What did you do?
- Tell me about a project where chip design was part of your work. What did you do?
- Tell me about a project where automation was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Rtl Design, Rtl Verification, Asic, Chip Design, and Automation. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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