Level

Amazon

Chip Design Engineer, Nitro Chip Design Team

Amazon is hiring a Chip Design Engineer, Nitro Chip Design Team in Tel Aviv, Israel. Level rates it ; you can apply on Level.

AI in this role

Design custom silicon infrastructure for cloud and ML accelerators as a chip design engineer. insurrection of AI mentions is hardware-focused.

rtlsoc
chip-designmicroarchitecturesynthesis
Annapurna Labs, an Amazon team, designs and delivers high-end, custom silicon at the heart of AWS. Our chips don't just support the cloud; they define it. From Trainium, the purpose-built ML accelerator driving the next wave of AI innovation, to Graviton, the Arm-based server processor redefining price-performance for compute workloads, to Nitro, the advanced network and cloud management controller that underpins every AWS instance, Annapurna's products set the standard for the industry.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the world's largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating, and deploying cutting-edge technologies - starting with identification and definition of project requirements, architecture, feature development, and collaboration with different groups. Your design will be integrated into the Nitro SoC, deployed on millions of servers worldwide. This is an opportunity to have a large-scale impact.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Watch these videos to learn more about Annapurna Labs and the Nitro project:
AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0
AWS re:Invent 2025 - Deep Dive into the AWS Nitro System https://www.youtube.com/watch?v=cD1mNQ9YbeA

Key job responsibilities
* Full ownership of one or more IPs within the product:
-Micro-architecture
-RTL coding and debug
-Synthesis and timing closure
-Sign-off
* Supporting the Verification and Emulation teams: Test plan, Coverage review
* Ensuring that the chip meets quality and reliability standards
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design

Basic qualifications

- 4+ years of experience in chip design
- Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog)
- BSc in Electrical Engineering/Computer Engineering/Computer Science

Preferred qualifications

- Background in protocols (AXI, CHI, DDR, Networking, PCIe)
- knowledge of Network-on-Chip (NOC) architecture
- Experience with coherent and non-coherent fabric design
- Experience with the entire SoC cycle – Synthesis / STA / CDC / Lint
- Experience with Design Automation tools and techniques
- Advanced degree in related technical field

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

How we rate this

Chip Design Engineer, Nitro Chip Design Team at Amazon rates 25 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Chip DesignMicroarchitectureSynthesisRtlSoc

Questions you could be asked

  1. Tell me about a project where chip design was part of your work. What did you do?
  2. Tell me about a project where microarchitecture was part of your work. What did you do?
  3. Tell me about a project where synthesis was part of your work. What did you do?
  4. What's a project where you used Rtl hands-on?
  5. Walk me through how you've used Soc in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Chip Design, Microarchitecture, Synthesis, Rtl, and Soc. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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