DFT ATPG Engineer

NVIDIA is hiring a DFT ATPG Engineer. Level rates it ; you can apply on NVIDIA.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
The posting mentions Mentor Testkompress, Tcl and Python among its tools and skills.
Level classes it as a senior role.
NVIDIA has 2,700+ other open roles on Level.

AI in this role

Design-for-Test engineer responsible for ATPG flows, pattern generation, and semiconductor test automation at NVIDIA.

mentor-testkompresstclpythonunix-shell

dftatpgasic-designfault-simulationsilicon-bring-up

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What you’ll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production

What we need to see:

3+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools
Strong programming skills in scripting languages
BSc. in Electrical Engineering or Computer engineering
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility

Ways to stand out from the crowd:

Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
Experience in Mentor TestKompress ATPG tool and retargeting flow
Programming languages: TCL, PRL, Phyton & Unix shell scripts
Experience with ATE and Silicon bring-up

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and autonomous, we want to hear from you! You will have the opportunity to work on some of the most incredible products on the market today.

How we rate this

DFT ATPG Engineer at NVIDIA rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

DFT ATPG Engineer is an open job at NVIDIA.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Israel, Yokneam.
The job was posted on October 13, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

DftAtpgAsic DesignFault SimulationSilicon Bring UpMentor TestkompressTclPython

Questions you could be asked

Tell me about a project where dft was part of your work. What did you do?
Tell me about a project where atpg was part of your work. What did you do?
Tell me about a project where asic design was part of your work. What did you do?
Tell me about a project where fault simulation was part of your work. What did you do?
Tell me about a project where silicon bring up was part of your work. What did you do?

Adapt your resume

List these exact terms on your resume: Dft, Atpg, Asic Design, Fault Simulation, and Silicon Bring Up. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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