FPGA Development Engineer (Mid level)
Sopra Steria is hiring an FPGA Development Engineer (Mid level). Level rates it ; you can apply on Sopra Steria.
Level's read on this job
- On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
- Level classifies it as a mid-level role.
- Level lists 2,000+ other open roles at Sopra Steria.
AI in this role
CS Group USA, a subsidiary of CS Group, is a key player in the development and certification of safety-critical systems in the aerospace industry in the United States.
Joining CS Group USA is a unique opportunity to work on complex high-tech systems for the most prestigious aerospace manufacturers in the country. Our team operates primarily remotely, with employees based across multiple U.S. states, offering flexibility while staying closely connected. We offer competitive compensation, comprehensive benefits, and a collaborative environment that fosters skill development and active involvement in the company’s growth.
Position Overview
We are seeking a capable FPGA Development Engineer with experience in real-time embedded systems development to lead requirements, design and development activities of safety-critical airborne systems.
The ideal candidate will be capable of receiving and implementing a development strategy in alignment with development lifecycles to satisfy DO-254 objectives. This individual will provide reliable implementation to certification and verification teams.
This role can be onsite (CT), hybrid, or fully remote.
Responsibilities
- Independently perform end-to-end FPGA development activities for embedded aerospace and defense systems from concept to integration.
- Collaborate across hardware, software, verification, and certification teams.
- Ensure compliance of FPGA development artifacts in accordance with DO-254 and AC 20-152A objectives.
- Able to understand and maintain interfacing between Hardware and FPGA.
- Able to understand and maintain interfacing between Software and FPGA.
- Ensure efficient and accurate implementation of hardware design in alignment with device-level requirements while maintaining accurate traceability.
- Support development efforts in alignment to developed schedules and quality objectives while interfacing with stakeholders to communicate technical status.
- Provide technical support to junior engineers.
Qualifications
- Bachelor's or degree in Electrical Engineering, Computer Engineering, or a related engineering, science, or technical discipline.
- Minimum of 3+ years of relevant experience in FPGA, programmable logic, digital hardware, or embedded systems development.
- Strong understanding of:
- Embedded hardware architectures and development processes
- VHDL, Verilog and SystemVerilog or similar hardware design languages
- Python and other equivalent scripting languages
- Strong analytical, troubleshooting, and root-cause investigation skills.
- Proficient written and verbal communication skills.
- U.S. Citizenship is required. Dual citizenship should be disclosed.
- Able to travel approximately up to two weeks per year.
CS Group US values diversity in the workplace and encourages women, visible minorities, ethnic minorities, aboriginal people and people with disabilities to apply.
All your information will be kept confidential according to EEO guidelines.
Benefits
- All members included in annual cash bonus opportunity
- 2% annual retirement benefit opportunity
- Training/Professional Development opportunities for all members
- 6 paid holidays
- Industry leading medical, dental, and vision Insurance
- Vacation / Sick Time / Bereavement leave
- Employee Assistance Program, including mental health benefits
- Spouse / Child Optional Life
- Whole Life Insurance / Critical Illness Insurance / Legal Assistance / Military Leave
How we rate this
FPGA Development Engineer (Mid level) at Sopra Steria rates 21 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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