Graduate Talent (ISCP SoC Front End Team)

Intel is hiring a Graduate Talent (ISCP SoC Front End Team). Level rates it ; you can apply on Level.

AI in this role

Contribute to the design, development, and pre-silicon verification of next-generation System-on-a-Chip technologies.

verilogsystemverilogpythonperlmodelsimsynopsys-vcs

digital-designsoc-architectureverificationautomation

Job Details:

Job Description:

The Role and Impact
Join our dynamic team in driving innovation at Intel, where you will contribute to the design, development, and validation of next-generation System-on-a-Chip (SoC) technologies. In this role, you will play a key part in shaping cutting-edge solutions that enhance user experiences across Intel's Client systems. Day-to-day, your work will involve a mix of hands-on technical design and verification tasks, ensuring the functionality, performance, and integration of SoC components.

Business group
Intel Corporation is at the forefront of developing technologies that power millions of devices worldwide. As part of the SPE ISCP SFD Domain23 team, you will join an organization dedicated to advancing SoC IP development and integration for Intel's latest products. This group plays a vital role in pushing the boundaries of innovation, collaborating across teams to deliver high-quality solutions that support Intel's leadership in technology.

Key Responsibilities

Contribute to the design, development, and verification of Intel proprietary SoC IPs.
Utilize hardware description languages such as Verilog or SystemVerilog to integrate and validate IPs within broader SoC architectures.
Collaborate with architects and cross-functional teams to ensure seamless IP interoperability and adherence to design requirements.
Develop and execute test plans, simulations, and coverage analysis to validate functionality.
Support debugging efforts to address pre-silicon validation and technical readiness challenges.
Create and maintain technical documentation, including design specifications and test plans.
Develop scripts and tools using programming languages like Python or Perl to automate workflows and enhance efficiency.
Contribute to process improvements in SoC development methodologies.

Qualifications:

Minimum Qualifications

A Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.
Proficiency in hardware description languages (HDLs) such as Verilog or SystemVerilog.
Knowledge of digital design principles, simulation, and verification methodologies.
Experience with programming or scripting languages, including Python, Perl, or Shell scripting.
Familiarity with EDA tools such as ModelSim or Synopsys VCS and industry-standard protocols.

Preferred Qualifications

Strong analytical and problem-solving skills.
Excellent communication and teamwork abilities.
A passion for innovation and eagerness to learn in a fast-paced environment.

We invite you to be part of the team that shapes the future of computing. Join us in advancing groundbreaking technologies and take your career to new heights by applying today.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

Graduate Talent (ISCP SoC Front End Team) at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Key facts

Graduate Talent (ISCP SoC Front End Team) is an open job at Intel.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Malaysia, Penang.
The job was posted on September 28, 2026.
Seniority: junior.
Applications are handled by Intel. Apply on Intel

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Digital DesignSoc ArchitectureVerificationAutomationVerilogSystemverilogPythonPerl

Questions you could be asked

Tell me about a project where digital design was part of your work. What did you do?
Tell me about a project where soc architecture was part of your work. What did you do?
Tell me about a project where verification was part of your work. What did you do?
Tell me about a project where automation was part of your work. What did you do?
Walk me through how you've used Verilog in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Digital Design, Soc Architecture, Verification, Automation, and Verilog. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them — a tool named with nothing behind it rarely survives a human read.

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