Hardware Engineer

IMC is hiring a Hardware Engineer in Sydney, Australia. Level rates it ; you can apply on IMC.

Level's read on this job

Little AI ●○○○ is how Level rates this role: aI is not part of the work.
The posting mentions Vhdl, Verilog and SystemVerilog among its tools and skills.
Level classes it as a senior role.
IMC has 169 other open roles on Level.
Posted within the past two weeks.

AI in this role

Architect, design, and deploy FPGA-based solutions for ultra-low latency trading systems and hardware logic optimization.

vhdlverilogsystemverilogpythoncvivadoquartus

fpgaasiclow-latencydigital-designhardware-architecture

IMC is a leading global market maker, driven by technology and built on a foundation of continuous innovation. Our teams blend trading expertise, advanced research, and world-class engineering to provide liquidity across exchanges and asset classes.

At IMC, speed and precision are essential. Our FPGA engineers play a critical role in designing and deploying hardware systems that sit on the absolute front line of trading—processing market data, making decisions, and executing trades in nanoseconds. These systems are custom-built to deliver ultra-low latency and deterministic performance, giving us a decisive edge in highly competitive markets. As part of the FPGA team, you’ll work closely with traders and technologists to build hardware that directly shapes trading outcomes.

We're looking for an exceptional FPGA Engineer to help us push the limits of performance and redefine what's possible in a competitive technological landscape where the best trading idea alone doesn’t cut it anymore. Instead, only the best trading ideas that are enabled via robust, scalable and fast technology win.

Your Core Responsibilities

Architect, design, and deploy FPGA-based solutions for parsing market data and executing trades with ultra-low latency.
Collaborate with traders and developers to translate strategy requirements into real-time hardware logic.
Analyse and optimize system performance at every level—from transceiver tuning to logic layout.
Develop and maintain a robust simulation and testing framework to ensure system reliability.
Monitor and improve FPGA performance in live trading environments through benchmarking and profiling.
Explore emerging technologies and bring new ideas to continually sharpen our hardware advantage.

Your Skills and Experience:

3+ years’ experience in financial markets, exchange protocols (FIX, OUCH, ITCH), or co-designing FPGA and software systems.
BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field.
Extensive experience with FPGA or ASIC technologies, including proficiency in either VHDL, Verilog, or SystemVerilog.
Strong engineering skills in Python, C++ or C.
Solid understanding of digital design principles, including pipelining, flow control, and clock domain crossing.
Experience with FPGA development tools and toolchains (Vivado, Quartus, Synplify, etc.).
Proven ability to optimize for low latency and high throughput in production systems.
Familiarity with networking protocols (e.g., Ethernet, TCP, UDP).

About Us

IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.

How we rate this

Hardware Engineer at IMC rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Hardware Engineer is an open job at IMC.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Sydney, Australia.
The job was posted on October 13, 2026.
Seniority: senior.
Applications are handled by IMC. Apply on IMC

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

FPGAAsicLow LatencyDigital DesignHardware ArchitectureVhdlVerilogSystemVerilog

Questions you could be asked

Tell me about a project where fpga was part of your work. What did you do?
Tell me about a project where asic was part of your work. What did you do?
Tell me about a project where low latency was part of your work. What did you do?
Tell me about a project where digital design was part of your work. What did you do?
Tell me about a project where hardware architecture was part of your work. What did you do?

Adapt your resume

List these exact terms on your resume: FPGA, Asic, Low Latency, Digital Design, and Hardware Architecture. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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