Memory Electrical Validation Engineer
Intel is hiring a Memory Electrical Validation Engineer in Bengaluru, India. Level rates it ; you can apply on Intel.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- Tools and skills the posting cites include electrical validation, signal integrity and debugging.
- Level classifies it as a mid-level role.
- Level lists 826 other open roles at Intel.
AI in this role
Optimize and validate electrical performance for memory IO interfaces and debug hardware issues.
Job Description:
The Role and Impact:
As a Memory Electrical Validation Engineer, you will play a pivotal role in optimizing and validating electrical performance for memory IO interfaces. You'll focus on ensuring compliance with industry standards, analyzing margins for stable operation, debugging electrical issues, and driving system-level improvements. Your expertise will directly contribute to delivering high-quality, reliable products that meet production goals while advancing Intel's innovative memory solutions.
Business group
The Silicon and Platform Engineering (SPE) Group leads Intel's efforts in designing, developing, and validating advanced silicon and platform technologies. This team is committed to delivering cutting-edge solutions that drive Intel's leadership in the semiconductor industry. By joining SPE, you'll be part of a collaborative environment that tackles challenging problems and powers Intel's success in creating transformative technologies for the future.
Key Responsibilities
- Define electrical validation strategies for memory IO interfaces to ensure optimized electrical performance and alignment with production goals.
- Validate circuit analog performance, signal integrity compliance, and system-level margins against industry standards.
- Analyze, debug, and optimize Memory Reference Code (MRC) requirements to improve margins and overall product quality.
- Collaborate on multidisciplinary research for testing, validation, and optimization of memory IO and mixed-signal architectures.
- Develop procedures and designs for validation processes, systems margin evaluation, and test infrastructure.
- Debug functional and triage failures to identify root causes and resolve electrical issues.
- Test electrical interactions between design features using advanced validation infrastructure.
- Prepare validation specifications, evaluate intellectual property (IP), and generate detailed test reports.
- Partner with architecture, design, and presilicon verification teams to ensure effective Design for Testability (DFT) and Design for Manufacturability (DFM) capabilities for IO architectures.
Qualifications:
Minimum Qualifications:
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 3+ years of hands-on industry experience in electrical validation or debugging
- Proficiency in validating signal integrity and electrical performance of memory IO interfaces.
- Experience with debugging electrical and system-level issues.
- Demonstrated ability to analyze, design, and optimize validation procedures and test infrastructure.
- Familiarity with compliance testing against industry-standard specifications.
Preferred Qualifications:
- Familiarity with memory validation tools, techniques, and methodologies.
- Strong collaborative skills, particularly in multidisciplinary research and cross-functional teamwork.
- Proven ability to develop and refine validation strategies for complex architectures.
- Passion for delivering innovative solutions and driving continuous improvement.
We're looking for someone eager to make a meaningful impact while solving complex challenges in memory validation. If you're ready to join a team that values collaboration, innovation, and excellence, we encourage you to apply today.
Job Type:
Experienced HireShift:
Shift 1 (India)Primary Location:
India, BangaloreAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/AWork Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.How we rate this
Memory Electrical Validation Engineer at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where electrical validation was part of your work. What did you do?
- Tell me about a project where signal integrity was part of your work. What did you do?
- Tell me about a project where debugging was part of your work. What did you do?
- Tell me about a project where memory interfaces was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Electrical Validation, Signal Integrity, Debugging, and Memory Interfaces. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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