NAND BM IP DV Engineer

Samsung Electronics is hiring an NAND BM IP DV Engineer. Level rates it ; you can apply on Samsung Electronics.

Level's read on this job

Little AI ●○○○ is how Level rates this role: aI is not part of the work.
Level classifies it as a senior role.
Level lists 592 other open roles at Samsung Electronics.

AI in this role

Position Summary

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

Samsung Semiconductor India Research (SSIR) is looking for a bright Design Verification Engineer who will be responsible for developing test environment, test bench development, bus protocol checking, transaction level checking and constraint random verification for Samsung memory. Memory team, SSIR Bangalore plays a key role in maintaining this leadership by continuous innovation and applying it to a real life products. We provide the opportunities for you to share and build up your knowledge and expertise, and collaborate to drive innovation forward. At Samsung, you will witness your ideas come to life in new products and solutions that shape the future.

Experience: 6+ years

Experience in advanced verification languages such as UVM, System Verilog is desirable.

Prior experience on memory design is a plus.

Create new and improve existing verification environment

Apply Universal Verification Methodology (SystemVerilog/UVM) and define verification plan as well as setup verification metrics in digital environments

Execute tests in these environments on RTL .Good debugging skills and Independent to work

Closely cooperate with designers and team members.

Good knowledge of System Verilog, Verilog

Know-how of Unix programming languages such as Shell, TCL, Perl/Python etc

Individual should be self-driven, adaptable, flexible, creative, and capable of working

Independently.

The candidate needs to be solution-orientated, quality-driven and focused on timely deliverables.

Skills and Qualifications

Qualifications

B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

How we rate this

NAND BM IP DV Engineer at Samsung Electronics rates 30 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.