Level

NVIDIA

Senior DFX Engineer

NVIDIA is hiring a Senior DFX Engineer in Shanghai, China. Level rates it ; you can apply on Level.

AI in this role

Design, implement, and verify DFX architecture and flows for NVIDIA semiconductor products.

verilogperlpythontcl
asic-designverificationdftjtagatpg

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 30 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.


What you'll be doing:

  • DFX planning, implementation, verification and silicon bring up at IP or fullchip level for NVIDIA's semiconductor products
  • Take lead role of some DFX areas in a project
  • Improve DFX design, architecture and flow

What we need to see:

  • MSEE with 4+ years of experience or PhD in DFT or related domains
  • Familiar with Verilog and ASIC design
  • Proven knowledge and expertise in JTAG, Scan, ATPG, fault models and ATE testing, etc.
  • Excellent analytical skills in verification and validation of test patterns and logic on sophisticated VLSI designs
  • Experience in silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing and diagnostics
  • Strong programming and scripting skills in Perl, Python or Tcl desired
  • Outstanding written and oral communication skills in English with the curiosity to work on rare challenges

How we rate this

Senior DFX Engineer at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

Prepare for this job

A free preview built only from this posting: what it asks for, what you could be asked in an interview, and how to adjust your resume.

Skills and AI tools this role asks for

Asic DesignVerificationDftJtagAtpgVerilogPerlPython

Questions you could be asked

  1. Tell me about a project where asic design was part of your work. What did you do?
  2. Tell me about a project where verification was part of your work. What did you do?
  3. Tell me about a project where dft was part of your work. What did you do?
  4. Tell me about a project where jtag was part of your work. What did you do?
  5. Tell me about a project where atpg was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Asic Design, Verification, Dft, Jtag, and Atpg. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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