Senior Front-End Power Engineer

NVIDIA is hiring a Senior Front-End Power Engineer in Tel Aviv, Israel. Level rates it ; you can apply on NVIDIA.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
The posting mentions Verilog, Python and Perl among its tools and skills.
Level classes it as a senior role.
NVIDIA has 2,600+ other open roles on Level.

AI in this role

Analyze chip power data and develop methodologies to improve energy efficiency for NVIDIA switches.

verilogpythonperlcpower-artistptpx

asic-designpower-optimizationrtlchip-architecture

We are now looking for a Power Optimization and Analysis Engineer! NVIDIA prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units’ power efficiency; you will be responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of NVIDIA Switches product line.

As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for NVIDIA's next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.

What You'll Be Doing:

Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
Develop and share best practices for performing pre-silicon power analysis.
Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
Select and run a wide variety of workloads for power analysis.
Prototype new architectural features in Verilog and power analysis.

What We Need To See:

BSC or MS in Computer Engineering or Electrical Engineering
5+ years of experience in chip design
Good and interpersonal skills; much collaboration with design teams is expected.
Familiarity with Verilog and ASIC design or verification.
Desire to bring data-driven decision-making and analytics to improve our products.
Strong coding/automation skills, preferably in Python, Perl, and C++.

Ways to Stand Out From the Crowd:

Experience with Power Artist, PTPX (Prime Power RTL, RTL Architect).
Strong understanding of concepts of energy consumption, estimation, data movement and low power design.

How we rate this

Senior Front-End Power Engineer at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior Front-End Power Engineer is an open job at NVIDIA.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Israel, Tel Aviv.
The job was posted on August 5, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Asic DesignPower OptimizationRtlChip ArchitectureVerilogPythonPerlC

Questions you could be asked

Tell me about a project where asic design was part of your work. What did you do?
Tell me about a project where power optimization was part of your work. What did you do?
Tell me about a project where rtl was part of your work. What did you do?
Tell me about a project where chip architecture was part of your work. What did you do?
Walk me through how you've used Verilog in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Asic Design, Power Optimization, Rtl, Chip Architecture, and Verilog. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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