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NVIDIA

Senior Full Chip Layout and Physical Verification CAD Engineer

NVIDIA is hiring a Senior Full Chip Layout and Physical Verification CAD Engineer. Level rates it ; you can apply on NVIDIA.

Level's read on this job

  • Level rates this role Little AI ●○○○: aI is not part of the work.
  • The posting mentions Python, Tcl and Shell among its tools and skills.
  • Level classes it as a senior role.
  • NVIDIA has 2,700+ other open roles on Level.

AI in this role

Develop full-chip physical design methodologies and physical verification flows for networking silicon and SOCs.

PythonTclShellMakeSynopsysCadenceCalibre
physical-designdrclvslayoutverificationcad

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

  • You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

  • Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

  • Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

  • We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

  • Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.

What we need to see:

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

  • You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

  • A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

  • Proficiency using Python, Tcl, Shell, Make scripting.

  • Experience in Linux environments.

  • AI tools orientation or alternatively a desire to learn.

  • Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

  • Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

  • Self-motivation, attention to detail, and good interpersonal skills.

Ways to stand out from the crowd:

  • Experience with data collection and analysis

  • Experience in methodology definition / flow owner of Full-chip / Place and Route

  • Great teammate.

  • Ownership, self-learning skills, and ability to work autonomously.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

How we rate this

Senior Full Chip Layout and Physical Verification CAD Engineer at NVIDIA rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Physical DesignDrcLvsLayoutVerificationCADPythonTcl

Questions you could be asked

  1. Tell me about a project where physical design was part of your work. What did you do?
  2. Tell me about a project where drc was part of your work. What did you do?
  3. Tell me about a project where lvs was part of your work. What did you do?
  4. Tell me about a project where layout was part of your work. What did you do?
  5. Tell me about a project where verification was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Physical Design, Drc, Lvs, Layout, and Verification. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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