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Nokia

Senior High-Speed Analog IC Design RD Engineer

Nokia is hiring a Senior High-Speed Analog IC Design RD Engineer. Level rates it ; you can apply on Nokia.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • Level classifies it as a senior role.
  • Level lists 576 other open roles at Nokia.

AI in this role

 

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​

 Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.​

Nokia is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to create innovative products in a fast-paced and collaborative team environment. The engineer will be hands-on with all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test and production ramp-up. As a member of a vertically-integrated team, the engineer will be directly supporting system level customers and will be closely working with product, operations and reliability teams. The self-motivated engineer must be able to anticipate problems and devise effective solutions.

NION2026
  • Responsible for developing > 100Gbaud ICs for future generation products
  • In charge of many aspects of IC product development, such as design, layout, and bring-up.
  • Work closely with verification, CAD, product and test engineering teams to devise and conduct DVT plans and characterization.

Minimum Experience Requirements:

  • Experience with High-speed analog IC designs with SiGe BiCMOS or CMOS
  • Knowledge of transmission lines and other high-frequency passive structures
  • A good understanding of device physics and impact on analog circuits and techniques to improve performance.
  • Experience with RF wafer probing, lab equipment and evaluation of high-speed analog ICs
  • Familiarity with VerilogA and CAD scripting languages (Skill, python, shell scripts) would be an asset.
  • Must be a team player with good verbal and written communication skills

Education Requirements:

  • BS 5+ years – MS/PhD preferred
  • MS 3+ years
  • PhD

How we rate this

Senior High-Speed Analog IC Design RD Engineer at Nokia rates 28 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

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