Senior SOC Design Engineer

Intel is hiring a Senior SOC Design Engineer. Level rates it ; you can apply on Intel.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Tools and skills the posting cites include UVM, Formal Verification and soc design.
Level classifies it as a senior role.
Level lists 805 other open roles at Intel.

AI in this role

Senior SoC Design Engineer needed to drive RTL logic design, microarchitecture integration, and pre-silicon validation for client chipsets.

uvmformal-verification

soc-designrtl-logicpre-silicon-validationmicroarchitecture

Job Details:

Job Description:

The Role and Impact

As a SoC Logic Design Engineer, you will play a pivotal role in the integration and pre-silicon validation of multiple IPs within Intel's client chipsets and SoC products. You will actively contribute to the development of cutting-edge microarchitecture, RTL logic design, and verification environments, ensuring the functionality and performance of next-generation features. Through collaboration with cross-functional teams, your work will drive innovation and establish quality improvements that impact Intel's product roadmap.

Business group

The IP Security Client Product Group focuses on delivering IPs, chipsets, and SoCs for Intel's client and server roadmap. As part of Intel Corporation's broader goals, the group empowers its members to innovate, grow, and deliver high-quality solutions that enhance Intel's leadership in the semiconductor industry. This team specializes in enabling end-to-end integration and pre-silicon validation to support Intel's cutting-edge technologies and products.

Key Responsibilities

Design and integrate microarchitecture, RTL logic, and verification environments across multiple IPs.
Debug and validate features, ensuring functionality and performance alignment to design specifications.
Develop robust test plans, coverage points, and test content for new architectural features.
Collaborate with cross-functional teams, including IP Design, Firmware, Structural Design, DFX, emulation, and validation teams, to optimize platform architecture and design.
Enhance organizational capabilities through contributions to quality and efficiency improvements and innovative methodologies.
Lead initiatives to influence design or validation microarchitecture across the SoC Front End Design team.

Qualifications:

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
6+ years of experience in RTL integration, validation techniques, and debug methodologies.
Proficiency in industry-standard methodologies such as UVM and formal verification.
Demonstrated expertise in microarchitecture design and integration.
Technical ability to validate and debug complex IP interfaces, including Fabric, Platform Essentials, and IOs.

Preferred Qualifications

Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
Proven track record of leadership by example and guiding technical initiatives.
Strong communication and collaboration skills with stakeholders across teams and locations.
Ability to identify opportunities for efficiency improvement while maintaining high-quality standards.
Passion for solving complex problems and proposing data-driven solutions.

Take the next step in your career by joining a team that drives innovation, fosters growth, and develops groundbreaking technologies.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

Senior SOC Design Engineer at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior SOC Design Engineer is an open job at Intel.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Malaysia, Penang.
The job was posted on October 16, 2026.
Seniority: senior.
Applications are handled by Intel. Apply on Intel

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Soc DesignRtl LogicPre Silicon ValidationMicroarchitectureUVMFormal Verification

Questions you could be asked

Tell me about a project where soc design was part of your work. What did you do?
Tell me about a project where rtl logic was part of your work. What did you do?
Tell me about a project where pre silicon validation was part of your work. What did you do?
Tell me about a project where microarchitecture was part of your work. What did you do?
Walk me through how you've used UVM in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Soc Design, Rtl Logic, Pre Silicon Validation, Microarchitecture, and UVM. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

Want an expert to read your CV for this job?

Free. Send your CV and the role you want next. You get your review by email within 24 hours.

Get a free CV review Get your CV rewritten Check your resume with the ATS resume checker