Samsung ElectronicsSenior Staff Engineer
Samsung Electronics is hiring a Senior Staff Engineer in Bengaluru, India. Level rates it ; you can apply on Samsung Electronics.
Level's read on this job
- On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
- Tools and skills the posting cites include SystemVerilog, UVM and Python.
- Level classifies it as a senior role.
- Level lists 617 other open roles at Samsung Electronics.
AI in this role
Drive design verification of semiconductor IP, subsystems, and SoCs using standard methodologies and tools.
Position Summary
About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities
Position: Design Verification Engineer
Roles and Responsibilities
Independent Verification Ownership of IP DV. Collaborating with various cross functional teams at multiple geo locations as part of execution. Expected to work hands on to close all aspects of verification activities including Testplan creation, building testbenches based on standard DV methodology, developing DV Infrastructure (Coverage/Regression/Simulation Scripts)
Domain: AXI, PCIe, UCIe protocol experience is highly preferred
Skills:
- Must have experience in developing test benches for IP/Subsystems/SoC.
- In depth knowledge and hands on experience in the execution of verification of SoC/Sub System/IP DV.
- Previous experience of independently driving IP DV projects from ability to lead a team by providing technical guidance, as well as be part of execution by debugging and SoC architecture understanding capabilities.
- Strong hands on experience with common verification tools and methodology including UVM/ System Verilog/CDV/MDV, DV signoffs.
- Must have a strong domain expertise in one or more following areas - AXI/PCIe/UCIe.
- Experience in Hybrid testbenches (SV, SystemC, Python) and SystemC based reference model test vectors/stimulus based verification is desirable.
Experience – 7 to 10 Years of experience
Qualifications
- B.Tech/B.E/M.Tech/M.E
Skills and Qualifications
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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How we rate this
Senior Staff Engineer at Samsung Electronics rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- What's a project where you used SystemVerilog hands-on?
- Walk me through how you've used UVM in your day-to-day work.
- What are the limits of Python that you've run into, and how did you work around them?
- What's a project where you used Systemc hands-on?
Adapt your resume
- List these exact terms on your resume: SystemVerilog, UVM, Python, and Systemc. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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